☆18Jun 29, 2026Updated last month
Alternatives and similar repositories for softex
Users that are interested in softex are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- The official implementation of the DAC 2024 paper GQA-LUT☆25Dec 20, 2024Updated last year
- An energy-efficient RISC-V floating-point compute cluster.☆145Aug 5, 2026Updated last week
- A simple, scalable, source-synchronous, all-digital DDR link☆40Updated this week
- Used FPGA board and System Verilog to design controller, DMA, pipelined SIMD processor, and GEMM accelerator☆13Aug 26, 2023Updated 2 years ago
- ☆13Mar 10, 2023Updated 3 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- ASIC simulation of Multi-ported Memory Module. And it can offer SRAM-based dual-port basic building block to support multiple read/write …☆25May 30, 2016Updated 10 years ago
- Graph your gate-level verilog code as a directed graph!☆17Nov 3, 2020Updated 5 years ago
- ☆50Apr 8, 2023Updated 3 years ago
- ☆21Aug 4, 2022Updated 4 years ago
- [HPCA 2026 Best Paper Candidate] Official implementation of "Focus: A Streaming Concentration Architecture for Efficient Vision-Language …☆61Feb 8, 2026Updated 6 months ago
- H2-LLM: Hardware-Dataflow Co-Exploration for Heterogeneous Hybrid-Bonding-based Low-Batch LLM Inference☆115Apr 26, 2025Updated last year
- An open source, parameterized SystemVerilog digital hardware IP library☆33May 26, 2024Updated 2 years ago
- GEMM and GEMM-Ops accelerator for PULP systems☆115Aug 5, 2026Updated last week
- You can run it on pynq z1. The repository contains the relevant Verilog code, Vivado configuration and C code for sdk testing. The size o…☆264Mar 24, 2024Updated 2 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- FSA: Fusing FlashAttention within a Single Systolic Array☆192Apr 15, 2026Updated 4 months ago
- Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.☆22Updated this week
- Research about dataflow architecture☆15Nov 30, 2023Updated 2 years ago
- ☆21Nov 18, 2022Updated 3 years ago
- ☆11Jan 25, 2023Updated 3 years ago
- FPGA 2025 SAT Accel: A modern SAT Solver on FPGA Repository☆14Mar 13, 2025Updated last year
- ☆30Feb 27, 2025Updated last year
- Cilk application benchmark programs☆11Aug 20, 2022Updated 3 years ago
- ☆19Jun 8, 2026Updated 2 months ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- 32 - bit floating point Multiplier Accumulator Unit (MAC)☆37Jan 12, 2021Updated 5 years ago
- ☆44Oct 21, 2025Updated 9 months ago
- OpenTestability is an open-source tool for structural analysis of digital circuits, enabling computation of SCOAP metrics, Controllibilit…☆19Aug 6, 2026Updated last week
- Flexible XNN Engine - reconfigurable accelerator prototype for CNNs and more!☆17Feb 20, 2026Updated 5 months ago
- This is the repository containing the implementation of sparse dense matrix multiplication for the matrix dimension of 560 x 560.☆10Jul 7, 2021Updated 5 years ago
- Petri Net Simulator program☆10Nov 27, 2017Updated 8 years ago
- The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 …☆536Updated this week
- for paper @ ASPLOS‘25’☆16Mar 27, 2025Updated last year
- whatever it means☆19Jun 10, 2026Updated 2 months ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- A library to parse BLIF (Berkeley Logic Interchange Format) files.☆10Mar 11, 2015Updated 11 years ago
- [NeurIPS 2024 Spotlight] Scalable and Effective Arithmetic Tree Generation for Adder and Multiplier Designs☆16Feb 22, 2026Updated 5 months ago
- ☆12Nov 25, 2021Updated 4 years ago
- ☆39Aug 27, 2025Updated 11 months ago
- ☆41Oct 21, 2025Updated 9 months ago
- A curated list of research in machine learning system. I also summarize some papers if I think they are really interesting.☆11Nov 6, 2021Updated 4 years ago
- ☆25May 14, 2025Updated last year