srishis / DMA8237ALinks
System Verilog based RTL design of DMA controller for 8086 microprocessor based systems.
☆29Updated 5 years ago
Alternatives and similar repositories for DMA8237A
Users that are interested in DMA8237A are comparing it to the libraries listed below
Sorting:
- A set of Wishbone Controlled SPI Flash Controllers☆97Updated 3 years ago
- DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow vi…☆86Updated last year
- PCI bridge☆20Updated 11 years ago
- Minimal DVI / HDMI Framebuffer☆83Updated 5 years ago
- Wishbone interconnect utilities☆44Updated last month
- An open source FPGA PCI core & 8250-Compatible PCI UART core☆46Updated 5 years ago
- ☆139Updated 2 weeks ago
- Small (Q)SPI flash memory programmer in Verilog☆68Updated 3 years ago
- ♻️ Convert the NEORV32 processor into a synthesizable plain-Verilog netlist module using GHDL.☆101Updated last month
- A DDR3(L) PHY and controller, written in Verilog, for Xilinx 7-Series FPGAs☆79Updated 3 years ago
- FPGA based microcomputer sandbox for software and RTL experimentation☆77Updated this week
- Example using DDR2 memory and MIG IP on the Nexys 4 DDR / Nexys A7 FPGA Trainer☆36Updated 3 years ago
- Portable HyperRAM controller☆62Updated last year
- Verilog Implementation of Run Length Encoding for RGB Image Compression☆27Updated 4 years ago
- A rudimental RISCV CPU supporting RV32I instructions, in VHDL☆125Updated 5 years ago
- Small Processing Unit 32: A compact RV32I CPU written in Verilog☆71Updated 3 years ago
- Generic FPGA SDRAM controller, originally made for AS4C4M16SA☆82Updated 5 years ago
- Exercises of the FPGA Prototyping By Verilog Examples book by Pong P. Chu☆25Updated 7 years ago
- 3D graphics rendering system for FPGA, the project contains hardware rasterizer, software geometry engine, and application middleware.☆92Updated 5 years ago
- RISC-V SoC Physical Implementation in 180 nm CMOS with a Quark Core Based on FemtoRV32☆56Updated 2 years ago
- Verilog wishbone components☆123Updated 2 years ago
- Open-source high performance AXI4-based HyperRAM memory controller☆82Updated 3 years ago
- Create fast and efficient standard cell based adders, multipliers and multiply-adders.☆120Updated 2 years ago
- A compact USB HID host FPGA core supporting keyboards, mice and gamepads.☆152Updated 10 months ago
- UART 16550 core☆38Updated 11 years ago
- SPI core☆12Updated 11 years ago
- Asynchronous fifo using verilog and testbench using system verilog. For asynchronous Fifo design in different module.☆40Updated 4 years ago
- A SoC for DOOM☆20Updated 4 years ago
- A basic GPU for altera FPGAs☆88Updated 6 years ago
- FPGA GPU design for DE1-SoC☆73Updated 4 years ago