Alternatives and similar repositories for NTU_PhysicalDesign_201902

Users that are interested in NTU_PhysicalDesign_201902 are comparing it to the libraries listed below

• Daikon-Sun / Physical-Design-for-Nanometer-ICs
  Assignments of Physical Design for Nanometer ICs (Spring 2017, Prof. Yao-Wen Chang)
  ☆41Updated 6 years ago
• Daikon-Sun / Routing-Visualization
  Routing Visualization for Physical Design
  ☆19Updated 6 years ago
• NTU-ALComLab / LSV-PA
  Logic Synthesis and Verification: Programming Assignments
  ☆12Updated 5 months ago
• luckyrantanplan / nthu-route
  VLSI EDA Global Router
  ☆73Updated 7 years ago
• twweeb / VLSI-Physical-Design-Automation
  Courseworks of CS6165 VLSI Physical Design Automation, NTHU.
  ☆41Updated 4 years ago
• limbo018 / OpenMPL
  An open multiple patterning framework
  ☆75Updated last year
• NTU-LaDS-II / qATG
  An open-source quantum automatic test generator.
  ☆14Updated 2 weeks ago
• cuhk-eda / cu-gr
  CUGR, VLSI Global Routing Tool Developed by CUHK
  ☆135Updated 2 years ago
• EricLu1218 / Physical_Design_Automation
  2019 NTHU CS6135 (CS613500) VLSI Physical Design Automation Course Projects (include Two-way Min-cut Partitioning, Fixed-outline Slicing …
  ☆35Updated last week
• cuhk-eda / REST
  REST, a reinforcement learning framework for constructing rectilinear Steiner Minimum tree (RSMT)
  ☆55Updated 3 years ago
• hankshyu / Digital-Design
  Hardware Description Language on FPGA
  ☆9Updated last year
• jacky860226 / nthu-route
  nthu-route 2.11
  ☆13Updated 5 years ago
• cuhk-eda / Xplace
  Xplace 3.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability and Timing Optimization
  ☆120Updated last week
• sanggido / OpenDP
  Open Source Detailed Placement engine
  ☆38Updated 5 years ago
• NVlabs / CircuitOps
  ☆80Updated last month
• mirkat1206 / Sequence-Pair-Floorplanner
  C++ implementation for Sequence Pair fixed-outline chip floorplanner
  ☆11Updated 2 years ago
• ByronHsu / FRAIGs
  C++ implementation of FRAIGs. Won the 1st place in 2018 Cadence-sponsored contest in NTU DSnP.
  ☆10Updated 4 years ago
• The-OpenROAD-Project / TritonRoute
  UCSD Detailed Router
  ☆87Updated 4 years ago
• cuhk-eda / dr-cu
  Dr. CU, VLSI Detailed Routing Tool Developed by CUHK
  ☆134Updated 2 years ago
• ieee-ceda-datc / RDF-2019
  DATC RDF
  ☆50Updated 4 years ago
• scale-lab / DRiLLS
  DRiLLS: Deep Reinforcement Learning for Logic Synthesis Optimization (ASPDAC'20)
  ☆113Updated 2 years ago
• limbo018 / Limbo
  Library for VLSI CAD Design Useful parsers and solvers' api are implemented.
  ☆157Updated 4 months ago
• The-OpenROAD-Project / PDNSim
  Power grid analysis
  ☆19Updated 4 years ago
• recurme / Mixed-Cell-Height_legalizer
  ☆10Updated 9 months ago
• scale-lab / OpenPhySyn
  EDA physical synthesis optimization kit
  ☆54Updated last year
• chengengjie / salt
  Steiner Shallow-Light Tree for VLSI Routing
  ☆51Updated 10 months ago
• UMN-EDA / BeGAN-benchmarks
  ☆24Updated last year
• mgraczyk / coursera-vlsicad
  Programming assignments for Coursera's U of I VLSI CAD: Logic to Layout
  ☆11Updated 11 years ago
• PKU-IDEA / OpenPARF
  🕹 OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit
  ☆142Updated 3 weeks ago
• jinwookjungs / lefdef_util
  A LEF/DEF Utility.
  ☆28Updated 5 years ago