EDDRSoftware / oaFileParser
This library is a low level parser for the OpenAccess file format.
☆15Updated 7 years ago
Alternatives and similar repositories for oaFileParser
Users that are interested in oaFileParser are comparing it to the libraries listed below
Sorting:
- ☆22Updated 4 years ago
- Interchange formats for chip design.☆29Updated last week
- A C++ VLSI circuit schematic and layout database library☆14Updated 10 months ago
- This library is a low level parser for the GDSII file format.☆34Updated 7 years ago
- A single-script repo for a script to turn a calibre layer file to a KLayout .lyp file☆13Updated 6 years ago
- GDS to ASCII Converter☆19Updated last year
- Design of Analog Blocks in Skywaters 130nm meeting corners: different flavors of OTA, BandGap, LDO.☆27Updated 2 years ago
- GDSII manipulation libaray☆16Updated last year
- cdsAsync: An Asynchronous QDI VLSI Toolset & Schematic Library☆25Updated 5 years ago
- skywater 130nm pdk☆28Updated last week
- repository for a bandgap voltage reference in SKY130 technology☆38Updated 2 years ago
- ☆18Updated last year
- Reads a Cadence techfile into KLayout and produces layer properties from it☆23Updated last year
- Automatic generation of real number models from analog circuits☆39Updated last year
- ☆20Updated 3 years ago
- Python interface for Cadence Spectre☆12Updated 3 months ago
- Parasitic Extraction for KLayout☆20Updated last week
- BAG framework☆40Updated 9 months ago
- Cadence SKILL utilities that have boosted my productivity considerably for 10+ years.☆43Updated last week
- ☆16Updated 9 months ago
- ☆41Updated 2 years ago
- tools regarding on analog modeling, validation, and generation☆22Updated 2 years ago
- GDSII file format links☆13Updated 5 years ago
- Arbitrary Cell Generator enables parametrized grid-free circuit layout creation☆15Updated 4 years ago
- A tiny Python package to parse spice raw data files.☆52Updated 2 years ago
- Minimal SKY130 example with self-checking LVS, DRC, and PEX☆23Updated 4 years ago
- Parametric layout generator for digital, analog and mixed-signal integrated circuits☆53Updated last week
- Intel's Analog Detailed Router☆38Updated 5 years ago
- Cadence Virtuoso Design Management System☆34Updated 2 years ago
- Parsing and generating popular formats of circuit netlist☆33Updated 2 years ago