efabless / caravel_user_project_analogLinks
☆48Updated 5 months ago
Alternatives and similar repositories for caravel_user_project_analog
Users that are interested in caravel_user_project_analog are comparing it to the libraries listed below
Sorting:
- Circuit Automatic Characterization Engine☆50Updated 5 months ago
- ☆79Updated 2 years ago
- ☆42Updated 4 months ago
- BAG framework☆41Updated 11 months ago
- XSCHEM symbol libraries for the Google-Skywater 130nm process design kit.☆63Updated last week
- Fully-differential asynchronous non-binary 12-bit SAR-ADC in SKY130, free to re-use under Apache-2.0 license☆42Updated 4 months ago
- An automatic clock gating utility☆50Updated 3 months ago
- Open source designs developed with IHP 130nm BiCMOS Open Source PDK. Documentation at https://ihp-open-ip.readthedocs.io/en/latest/☆52Updated 3 months ago
- Plugins for Yosys developed as part of the F4PGA project.☆83Updated last year
- ☆37Updated 3 years ago
- Version manager (and builder) for the Google sky130 and gf180mcu open-source PDKs☆66Updated 2 weeks ago
- Parasitic capacitance analysis of foundry metal stackups☆15Updated 2 months ago
- submission repository for efabless mpw6 shuttle☆30Updated last year
- PLL Designs on Skywater 130nm MPW☆20Updated last year
- ☆35Updated 8 months ago
- VSDFLOW is an automated solution to programmers, hobbyists and small scale semiconductor technology entrepreneurs who can craft the…☆16Updated 4 years ago
- ☆55Updated last year
- Skywater 130nm Klayout Device Generators PDK☆31Updated last year
- JKU IIC OSIC-Multitool for open-source IC (OSIC) design for SKY130.☆65Updated 3 months ago
- Open-source repository for a standard-cell library characterizer using complete open-source tools☆35Updated this week
- ☆39Updated 2 years ago
- Characterizer☆28Updated last month
- KLayout technology files for Skywater SKY130☆40Updated last year
- https://caravel-mgmt-soc-litex.readthedocs.io/en/latest/☆28Updated 5 months ago
- tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles☆36Updated 2 years ago
- 8x PLL Clock Multiplier IP with an input frequency range of 5Mhz to 12.5Mhz and output frequency range of 40Mhz to 100Mhz, giving a 8x mu…☆114Updated 3 years ago
- Minimal SKY130 example with self-checking LVS, DRC, and PEX☆23Updated 4 years ago
- Create fast and efficient standard cell based adders, multipliers and multiply-adders.☆115Updated last year
- Coriolis VLSI EDA Tool (LIP6)☆68Updated this week
- This repository is for (pre-)release versions of the Revolution EDA.☆42Updated last month