AugustUnderground / pyspectre

Related projects ⓘ

Alternatives and complementary repositories for pyspectre

• ananthchellappa / SKILL
  Cadence SKILL utilities that have boosted my productivity considerably for 10+ years.
  ☆38Updated 3 weeks ago
• KenKundert / psf_utils
  Read Spectre PSF files
  ☆51Updated this week
• cascode-labs / virtue
  A Python and SKILL Framework for Cadence Virtuoso
  ☆33Updated 8 months ago
• ashwith / pyMOSChar
  Python port of Prof. Boris Murmann's gm/ID Starter Kit
  ☆51Updated 7 years ago
• Vlsir / Vlsir
  Interchange formats for chip design.
  ☆27Updated 3 months ago
• dwarning / VA-Models
  Verilog-A simulation models
  ☆53Updated last week
• gdsfactory / skywater130
  skywater 130nm pdk
  ☆26Updated last month
• AyarLabs / ACG
  Arbitrary Cell Generator enables parametrized grid-free circuit layout creation
  ☆13Updated 4 years ago
• DDD-FIT-CTU / CMOS-SPICE-Model-Collections
  MOSIS MPW Test Data and SPICE Models Collections
  ☆26Updated 4 years ago
• christophmuellerorg / spectre_python
  Simple and most probably incomplete parser for spectre netlists
  ☆16Updated 8 years ago
• dreoilin / pygmid
  A python3 gm/ID starter kit
  ☆39Updated 2 months ago
• The-OpenROAD-Project / OpenRCX
  ☆19Updated 3 years ago
• johnkustin / bandgapReferenceCircuit
  repository for a bandgap voltage reference in SKY130 technology
  ☆34Updated last year
• fsitok / gds3xtrude
  Simple 3D layout viewer for KLayout (Salt package)
  ☆19Updated 5 years ago
• KenKundert / flicker-noise
  How to correctly write a flicker-noise model for RF simulation.
  ☆19Updated last year
• gmagno / spyci
  A tiny Python package to parse spice raw data files.
  ☆43Updated last year
• bmurmann / COCOA
  COCOA: Collaborative Compendium on Analog Integrated Circuits
  ☆11Updated 2 months ago
• fengqzHD / gmIdNeoKit
  Gm Id Kit with GUI to Work with Matlab Data file similar to Prof. Boris Murmann's gm/ID Starter Kit
  ☆41Updated 4 years ago
• bluecheetah / cbag
  A C++ VLSI circuit schematic and layout database library
  ☆13Updated 4 months ago
• mdmfernandes / socad
  Connect Cadence Virtuoso to a Python client using sockets.
  ☆15Updated 4 years ago
• dan-fritchman / Netlist
  Parsing and generating popular formats of circuit netlist
  ☆28Updated last year
• jimwang99 / parser-for-chip-design
  A set of Python based parsers for multiple file format used in IC chip design, including Verilog, SPICE, lib (Synopsys Liberty).
  ☆27Updated 9 years ago
• ucb-art / bag
  BAG framework
  ☆21Updated 3 months ago
• ucdrstdenis / cdsAsync
  cdsAsync: An Asynchronous VLSI Toolset & Schematic Library
  ☆25Updated 5 years ago
• bmurmann / Ngspice-on-Colab
  Sandbox for experimenting with Ngspice and open PDKs in Google Colab
  ☆21Updated 5 months ago
• mabrains / sky130_klayout_pdk
  Skywater 130nm Klayout Device Generators PDK
  ☆29Updated 4 months ago
• analogdevicesinc / vampyre
  ☆17Updated 7 months ago
• mabrains / Analog_blocks
  Design of Analog Blocks in Skywaters 130nm meeting corners: different flavors of OTA, BandGap, LDO.
  ☆26Updated 2 years ago
• henjo / pyoa
  Donald Amundson's Python interface to OpenAccess IC design data API
  ☆16Updated 14 years ago