BitOpenFPGA / arl
lists of most popular repositories for most favoured programming languages (according to StackOverflow)
☆81Updated 4 years ago
Alternatives and similar repositories for arl:
Users that are interested in arl are comparing it to the libraries listed below
- Cortex M0 based SoC☆71Updated 3 years ago
- FPGA Technology Exchange Group相关文件管理☆43Updated last year
- Vivado诸多IP,包括图像处理等☆196Updated 7 months ago
- RTL Verilog library for various DSP modules☆85Updated 3 years ago
- AXI DMA 32 / 64 bits☆109Updated 10 years ago
- Step by step tutorial for building CortexM0 SoC☆36Updated 2 years ago
- ☆36Updated 9 years ago
- upgrade to e203 (a risc-v core)☆40Updated 4 years ago
- commit rtl and build cosim env☆36Updated 11 months ago
- 视频旋转(2019FPGA大赛)☆33Updated 4 years ago
- AMBA bus generator including AXI4, AXI3, AHB, and APB☆194Updated last year
- ☆66Updated 3 years ago
- AXI总线连接器☆96Updated 4 years ago
- Interface Protocol in Verilog☆49Updated 5 years ago
- FPGA☆122Updated 4 years ago
- FFT implement by verilog_测试验证已通过☆54Updated 8 years ago
- AHB3-Lite Interconnect☆86Updated 10 months ago
- The next generation integrated development environment for processor design and verification. It has multi-hardware language support, o…☆103Updated 2 years ago
- 这是我所开发的两个项目,包括ov5640-ddr3-usb2.0高速图像采集系统以及NOIP1SN1300A-ddr3-sdhc高速地表图像采集及存储系统☆85Updated 7 years ago
- A picorv32-riscv Soc with DMAC and Ethernet controller & lwip & Kirtex7@333MHz☆68Updated 3 years ago
- AHB DMA 32 / 64 bits☆54Updated 10 years ago
- ARM中通过APB总线连接的UART模块☆63Updated 5 years ago
- ☆141Updated last month
- Real time face detection based on Arm Cortex-M3 DesignStart and FPGA☆196Updated last year
- SpinalHDL-tutorial based on Jupyter Notebook☆132Updated 9 months ago
- A 16-point radix-4 FFT chip, including Verilog codes, netlists and layout. Group project.☆60Updated 7 months ago
- achieve softmax in PYNQ with heterogeneous computing.☆63Updated 6 years ago
- image processing based FPGA☆102Updated 3 years ago
- FPGA 同步FIFO与异步FIFO☆29Updated 6 years ago
- Must-have verilog systemverilog modules☆31Updated 2 years ago