Alternatives and similar repositories for Regex-FPGA

Users that are interested in Regex-FPGA are comparing it to the libraries listed below

• warclab / dyract
  DyRACT Open Source Repository
  ☆16Updated 9 years ago
• ash-aldujaili / spatial-filter-hdl
  High Throughput Image Filters on FPGAs
  ☆14Updated 8 years ago
• JohnDRO / Golirev-IDE
  An online Verilog IDE based on YosysJS.
  ☆24Updated 9 years ago
• adamwalker / fpga-kvs
  A networked FPGA key-value store written in Clash
  ☆29Updated last year
• jck / riscv
  ☆19Updated last year
• fpgasystems / doppiodb
  doppioDB - A hardware accelerated database
  ☆49Updated 8 years ago
• eventhelix / open-lte
  An open source 3GPP LTE implementation. (GitHub import of https://sourceforge.net/projects/openlte/)
  ☆10Updated 8 years ago
• pulp-platform / pulp-freertos
  FreeRTOS for PULP
  ☆15Updated 2 years ago
• pulp-platform / trace_debugger
  Capture retired instructions of a RISC-V Core and compress them to a sequence of packets.
  ☆19Updated last year
• openhwgroup / core-v-sw
  Main Repo for the OpenHW Group Software Task Group
  ☆17Updated 7 months ago
• fpgasystems / caribou
  Caribou: Distributed Smart Storage built with FPGAs
  ☆67Updated 7 years ago
• ZipCPU / zipversa
  A Versa Board implementation using the AutoFPGA/ZipCPU infrastructure
  ☆16Updated 5 years ago
• plasma-umass / memory-landscape
  The space of memory management research and systems produced by the PLASMA lab (https://plasma-umass.org).
  ☆20Updated 4 years ago
• argos-research / fpga-mmu
  internship
  ☆10Updated 8 years ago
• dimdano / faiss-fpga
  An FPGA integration and acceleration of the popular FAISS framework for approximate similarity search
  ☆24Updated 6 years ago
• lowRISC / lowrisc-fpga
  Untethered (stand-alone) FPGA implementation of the lowRISC SoC
  ☆55Updated 6 years ago
• ultraembedded / core_uriscv
  Another tiny RISC-V implementation
  ☆59Updated 4 years ago
• aswaterman / trainwreck
  Original RISC-V 1.0 implementation. Not supported.
  ☆42Updated 7 years ago
• riscv-admin / riscv-ovpsim
  ☆61Updated 4 years ago
• SymbiFlow / vtr-verilog-to-routing
  SymbiFlow WIP changes for Verilog to Routing -- Open Source CAD Flow for FPGA Research
  ☆38Updated last year
• MadhumithaSridhara / QuickMatch
  Evaluation of parallel regular expression matching on GPU
  ☆15Updated 8 years ago
• ucb-ee290c / fa18-smartnic
  SmartNIC
  ☆14Updated 6 years ago
• honggyukim / heaptrace
  a tool that collects and reports heap allocated memory
  ☆14Updated 3 weeks ago
• stacksmith / fpgasm
  FPGA assembler! Create bare-metal FPGA designs without Verilog or VHDL (Not to self: use Lisp next time)
  ☆53Updated 4 years ago
• s-kanev / XIOSim
  A detailed michroarchitectural x86 simulator
  ☆62Updated 8 years ago
• parallella / openeda
  Open source EDA chip design flow
  ☆51Updated 8 years ago
• ultraembedded / altor32
  AltOr32 - Alternative Lightweight OpenRisc CPU
  ☆12Updated 9 years ago
• Poofjunior / fpga_fast_serial_sort
  a parallel sorting algorithm implemented in hardware that sorts data in linear time as it arrives serially
  ☆41Updated 9 years ago
• jbush001 / ChiselGPU
  Experiments with fixed function renderers and Chisel HDL
  ☆59Updated 6 years ago
• dormando / verilog-raycaster
  FPGA raycaster engine written in verilog
  ☆12Updated 6 years ago