ARM-software / DeepFreeze
☆40Updated 5 years ago
Alternatives and similar repositories for DeepFreeze:
Users that are interested in DeepFreeze are comparing it to the libraries listed below
- FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks☆42Updated 2 years ago
- MAESTRO binary release☆22Updated 5 years ago
- MAERI public release☆31Updated 3 years ago
- ☆83Updated 8 months ago
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆61Updated 3 years ago
- Provides the hardware code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerator…☆24Updated 4 years ago
- ☆56Updated 4 years ago
- ☆69Updated 4 years ago
- Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.☆67Updated 5 years ago
- ☆33Updated 5 years ago
- CHIPKIT: An agile, reusable open-source framework for rapid test chip development☆40Updated 4 years ago
- Tutorials on HLS Design☆51Updated 5 years ago
- ☆71Updated 2 years ago
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆45Updated 2 years ago
- Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ☆55Updated 3 years ago
- A 32-bit RISC-V Processor Designed with High-Level Synthesis☆52Updated 5 years ago
- HLS implemented systolic array structure☆41Updated 7 years ago
- ☆34Updated 3 years ago
- Accelergy is an energy estimation infrastructure for accelerator energy estimations☆133Updated 2 weeks ago
- An open-source DRAM power model based on extensive experimental characterization of real DRAM modules. Described in the SIGMETRICS 2018 …☆38Updated 5 years ago
- Lab code for three-day lecture, "Designing CNN Accelerators using Bluespec System Verilog", given at SNU in December 2017☆27Updated 6 years ago
- A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching☆46Updated 4 months ago
- Tool for optimize CNN blocking☆93Updated 4 years ago
- RTL implementation of Flex-DPE.☆97Updated 4 years ago
- Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop☆48Updated 3 weeks ago
- ☆25Updated 10 months ago
- ☆27Updated 5 years ago
- ☆33Updated 3 weeks ago
- Contains FPGA benchmarks for Vivado HLS and Catapult HLS☆26Updated 4 years ago
- Introductory examples for using PYNQ with Alveo☆50Updated last year