Alternatives and similar repositories for LMS-sound-filtering-by-Verilog

Users that are interested in LMS-sound-filtering-by-Verilog are comparing it to the libraries listed below

• DexWen / LMS-Adaptive-filter
  LMS-Adaptive Filter implement using verilog and Matlab
  ☆48Updated 9 years ago
• Grootzz / Verilog-FIR
  FIR implemention with Verilog
  ☆50Updated 6 years ago
• ajackevic / ELEC5882
  The Design and Implementation of a Pulse Compression Filter on an FPGA.
  ☆32Updated 4 years ago
• lauchinyuan / FPGA_DDR3_Ctrl
  An AXI DDR3 SDRAM controller for FPGA
  ☆43Updated 2 years ago
• echoPinkApple / bilinear
  Bilinear interpolation realizes image scaling based on FPGA
  ☆29Updated 5 years ago
• BigPig-Bro / udp_gmii_ov5640
  本项目为2023年全国大学生嵌入式芯片与系统设计竞赛——FPGA创新设计竞赛（高云赛道）项目，题目基于高云FPGA的多路网络视频监控编码系统。
  ☆62Updated 2 years ago
• Floral / Pose-Detection-of-MPU6050-Based-on-FPGA
  FPGA implementation of pose detection with Kalman filter. (verilog)
  ☆37Updated 3 years ago
• maxs-well / FIR_Implementation
  FIR filter implementation
  ☆29Updated 5 years ago
• DexWen / FFT_Verilog
  FFT implement by verilog_测试验证已通过
  ☆60Updated 9 years ago
• aq12138 / Git_Bilbili
  verilog
  ☆21Updated 2 years ago
• Elrori / Delta-sigma-ADC-verilog
  Delta-sigma ADC,PDM audio FPGA Implementation
  ☆73Updated 3 years ago
• Starrynightzyq / ZYNQ-PYNQ-Z2-Gobang
  2018第二届全国大学生FPGA创新设计邀请赛的作品
  ☆63Updated 7 years ago
• suisuisi / FPGATechnologyGroup
  FPGA Technology Exchange Group相关文件管理
  ☆67Updated 2 weeks ago
• luyixdu / ZYNQ_ov5640_hdmi_frame_difference
  帧差法运动目标检测，基于ZYNQ7020
  ☆81Updated 4 years ago
• red435 / verilog_APB_SPI_interface
  SPI interface connect to APB BUS with Verilog HDL
  ☆39Updated 4 years ago
• JoshuaEbenezer / FFT-cordic-HDL
  FFT implementation using CORDIC algorithm written in Verilog.
  ☆34Updated 7 years ago
• Nitcloud / Image_sim
  基于FPGA的图像处理模块（出自于crazybingo）（将部分IP换为纯Verilog用于跨平台移植）
  ☆50Updated 5 years ago
• Frogwells / fpga_design
  这是我所开发的两个项目，包括ov5640-ddr3-usb2.0高速图像采集系统以及NOIP1SN1300A-ddr3-sdhc高速地表图像采集及存储系统
  ☆96Updated 8 years ago
• freecores / verilog_cordic_core
  configurable cordic core in verilog
  ☆53Updated 11 years ago
• suisuisi / FPGA
  FPGA
  ☆127Updated 5 years ago
• cterrill26 / FPGA_AudioVisualizer
  Verilog code for an efficient and scalable DFT calculator (using the FFT algorithm). Meant to be implemented on an Intel DE10-Lite FPGA d…
  ☆19Updated 5 years ago
• shun6-6 / Tri_Eth_UDP_pro_stack
  基于FPGA的三速以太网UDP协议栈设计
  ☆35Updated last year
• Frogwells / fpga_cmos_design
  这是使用FPGA开发CMOS的两个真实项目，之前的fpga_design仅是一个未完善的版本，同时也删除了一些与项目无关的东西
  ☆36Updated 8 years ago
• RedFlag2017 / rs-codec
  Reed Solomon Encoder and Decoder Digital IP
  ☆21Updated 5 years ago
• xkw168 / Digital-recognition
  digital recognition base on FPGA
  ☆12Updated 6 years ago
• suisuisi / basic_systemverilog
  Must-have verilog systemverilog modules
  ☆37Updated 3 years ago
• uwemeyerbaese / DSP_with_FPGAs_ed4
  DSP with FPGAs 4. edition ISBN: 978-3-642-45308-3
  ☆76Updated 2 months ago
• DeamonYang / FPGA_FFT
  基于FPGA的FFT
  ☆19Updated 6 years ago
• DeamonYang / FPGA_SYNC_ASYNC_FIFO
  FPGA 同步FIFO与异步FIFO
  ☆32Updated 6 years ago
• WalkerLau / DetectHumanFaces
  Real time face detection based on Arm Cortex-M3 DesignStart and FPGA
  ☆211Updated 2 years ago