BIGWJZ / VLSI-DSP-Review
☆68Updated 4 years ago
Alternatives and similar repositories for VLSI-DSP-Review:
Users that are interested in VLSI-DSP-Review are comparing it to the libraries listed below
- verilog实现TPU中的脉动阵列计算卷积的module☆92Updated 3 years ago
- A 16-bit by 16-bit signed binary multiplier based on the Radix-4 Booth algorithm and Wallace Tree reduction☆42Updated 7 months ago
- 3×3脉动阵列乘法器☆44Updated 5 years ago
- syn script for DC Compiler☆12Updated 2 years ago
- Some useful documents of Synopsys☆70Updated 3 years ago
- ☆20Updated last year
- AXI总线连接器☆97Updated 5 years ago
- INT8 & FP16 multiplier accumulator (MAC) design with UVM verification completed.☆97Updated 4 years ago
- 清華大學 | 積體電路設計實驗 (IC LAB) | 110上☆34Updated 2 years ago
- Open IP in Hardware Description Language.☆19Updated last year
- Verilog program☆13Updated 4 years ago
- A SystemVerilog implementation of Row-Stationary dataflow and Hierarchical Mesh Network-on-Chip Architecture based on Eyeriss CNN Acceler…☆147Updated 5 years ago
- AXI协议规范中文翻译版☆142Updated 2 years ago
- ☆32Updated 6 months ago
- A verilog implementation for Network-on-Chip☆72Updated 7 years ago
- upgrade to e203 (a risc-v core)☆41Updated 4 years ago
- achieve softmax in PYNQ with heterogeneous computing.☆63Updated 6 years ago
- FFT generator using Chisel☆58Updated 3 years ago
- ☆16Updated last year
- tpu-systolic-array-weight-stationary☆24Updated 3 years ago
- A 16-point radix-4 FFT chip, including Verilog codes, netlists and layout. Group project.☆60Updated 7 months ago
- Deep Learning Accelerator (Convolution Neural Networks)☆179Updated 7 years ago
- IC Verification & SV Demo☆52Updated 3 years ago
- ☆20Updated last week
- ☆31Updated 5 years ago
- ☆104Updated 4 years ago
- Verilog implementation of Softmax function☆62Updated 2 years ago
- Designing CNN accelerator using a Xilinx FPGA board and comparing performance with CPU.☆22Updated 4 years ago
- A Flexible and Energy Efficient Accelerator For Sparse Convolution Neural Network☆59Updated last month
- SystemVerilog files for lab project on a DNN hardware accelerator☆16Updated 3 years ago