mdmfernandes / socadLinks
Connect Cadence Virtuoso to a Python client using sockets.
☆17Updated 5 years ago
Alternatives and similar repositories for socad
Users that are interested in socad are comparing it to the libraries listed below
Sorting:
- Cadence Virtuoso Design Management System☆36Updated 2 years ago
- Inter Process Communication (IPC) between Python and Cadence Virtuoso☆79Updated 8 years ago
- Read Spectre PSF files☆69Updated 3 months ago
- Python port of Prof. Boris Murmann's gm/ID Starter Kit☆54Updated 8 years ago
- Python interface for Cadence Spectre☆17Updated 3 months ago
- A Python and SKILL Framework for Cadence Virtuoso☆43Updated last year
- A python3 gm/ID starter kit☆54Updated 2 months ago
- Jupyter kernel for Cadence SKILL☆22Updated 8 years ago
- Advanced integrated circuits 2023☆32Updated last year
- Cadence SKILL utilities that have boosted my productivity considerably for 10+ years.☆50Updated 2 months ago
- A tiny Python package to parse spice raw data files.☆54Updated 2 years ago
- Gm Id Kit with GUI to Work with Matlab Data file similar to Prof. Boris Murmann's gm/ID Starter Kit☆48Updated 5 years ago
- my cadence/virtuoso/icfb skill functions develloped over the years☆143Updated last month
- Parametric layout generator for digital, analog and mixed-signal integrated circuits☆61Updated this week
- A seamless python to Cadence Virtuoso Skill interface☆240Updated 8 months ago
- PSF simulation data c++ library☆27Updated last year
- LAYout with Gridded Objects v2☆65Updated 4 months ago
- repository for a bandgap voltage reference in SKY130 technology☆41Updated 2 years ago
- Cadence Virtuoso Git Integration written in SKILL++☆158Updated 3 years ago
- Python script for generating lookup tables for the gm/ID design methodology and much more ...☆104Updated 6 months ago
- Files for Advanced Integrated Circuits☆31Updated 2 weeks ago
- Python interface to Cadence Virtuoso data☆14Updated 11 years ago
- BAG framework☆30Updated 10 months ago
- How to correctly write a flicker-noise model for RF simulation.☆23Updated last month
- Automatic generation of real number models from analog circuits☆45Updated last year
- Verilog-A simulation models☆84Updated last week
- Parsing and generating popular formats of circuit netlist☆37Updated 2 years ago
- GDSII File Parsing, IC Layout Analysis, and Parameter Extraction☆127Updated 2 years ago
- This library is an attempt to make transistor sizing for Analog design less painful.☆20Updated 2 months ago
- Simple and most probably incomplete parser for spectre netlists☆15Updated 9 years ago