Alternatives and similar repositories for aws-cloud-and-xilinx-workshop

Users that are interested in aws-cloud-and-xilinx-workshop are comparing it to the libraries listed below

• maltanar / rosetta
  Rapidly deploy Chisel and Vivado HLS accelerators on Xilinx PYNQ
  ☆33Updated 6 years ago
• awslabs / aws-fpga-app-notes
  Application notes for the F1 EC2 Instance
  ☆88Updated 3 years ago
• Xilinx / PYNQ-Networking
  Networking Overlay on PYNQ
  ☆49Updated 6 years ago
• cathalmccabe / pynq-z1_board_files
  PYNQ-Z1 board files for Vivado
  ☆34Updated 3 years ago
• xupgit / compute_acceleration
  ☆12Updated 5 years ago
• splineai-cloud / COVID-XS
  CNN based Deep Learning for Detecting COVID-19 from X-Ray images.The Deep Learning is deployed in AWS IoT GreenGrass with Xilinx ZCU104 …
  ☆19Updated 4 years ago
• Avnet / Ultra96-PYNQ
  Board files to build Ultra 96 PYNQ image
  ☆155Updated 6 months ago
• hackwa / pynqfire
  Python FIR Filter Package for Xilinx Pynq Board
  ☆28Updated 7 years ago
• Xilinx / SDSoC_Examples
  ☆84Updated 4 years ago
• tchoyt / pynq_dev
  Updated Xilinx PYNQ for Zynq + ZynqMP python HW acceleration development
  ☆12Updated 7 years ago
• wady101 / Embedded-System-Design-Flow-on-Zynq
  Updated version of the XUP Workshops
  ☆18Updated 6 years ago
• Xilinx / PYNQ_Composable_Pipeline
  PYNQ Composabe Overlays
  ☆73Updated last year
• Xilinx / chipscopy
  ChipScoPy (ChipScope Python API) is an open source Python API to the various ChipScope services provided by the TCF-based (Target Communi…
  ☆55Updated 3 weeks ago
• Xilinx / Alveo-PYNQ
  Introductory examples for using PYNQ with Alveo
  ☆51Updated 2 years ago
• JennySmith888 / 100GBE-PYNQ
  ☆19Updated 3 years ago
• fpgadeveloper / microzed-axi-dma
  Demonstration of the AXI DMA engine on the MicroZed
  ☆26Updated 4 years ago
• ikwzm / ZynqMP-FPGA-Ubuntu18.04-Ultra96
  Ubuntu 18.04 Desktop for Ultra96/Ultra96-V2
  ☆19Updated 5 years ago
• Xilinx / RFSoC2x2-PYNQ
  RFSoC2x2 board repo for PYNQ
  ☆17Updated 2 years ago
• strath-sdr / rfsoc_qpsk
  PYNQ example of using the RFSoC as a QPSK transceiver.
  ☆103Updated 2 years ago
• AEW2015 / PYNQ_PR_Overlay
  Adding PR to the PYNQ Overlay
  ☆17Updated 8 years ago
• FPGA-Research / fos
  FOS - FPGA Operating System
  ☆68Updated 4 years ago
• Digilent / digilent-vivado-scripts
  ☆69Updated 3 months ago
• lite-david / comet
  RISC-V ISA based 32-bit processor written in HLS
  ☆17Updated 5 years ago
• Architech-Silica / Designing-a-Custom-AXI-Master-using-BFMs
  A guide to creating custom AXI4 masters using the Xilinx Vivado tools and Bus Functional Models
  ☆34Updated 7 years ago
• Xilinx / DSP-PYNQ
  A PYNQ overlay demonstrating Pythonic DSP running on Zynq UltraScale+
  ☆39Updated 2 years ago
• PeterOgden / PYNQ_image
  Scripts to automate the process of building an image for the Xilinx PYNQ project. This repository is deprecated as its functionality is n…
  ☆20Updated 8 years ago
• Avnet / petalinux
  Repository used to support automated builds under PetaLinux tools that use Yocto.
  ☆61Updated 3 months ago
• pezy-computing / pzbcm
  Basic Common Modules
  ☆39Updated last month
• cornell-brg / pymtl-tut-hls
  Tutorial for integrating PyMTL and Vivado HLS
  ☆18Updated 9 years ago
• mcjtag / axis-uart
  AXI Stream UART (verilog)
  ☆11Updated 5 years ago