ucb-bar / hwacha-template
Template for projects using the Hwacha data-parallel accelerator
☆34Updated 3 years ago
Related projects ⓘ
Alternatives and complementary repositories for hwacha-template
- C/Assembly macros for talking with Rocket Custom Coprocessors (RoCCs)☆52Updated 4 years ago
- ☆42Updated 3 years ago
- CHIPKIT: An agile, reusable open-source framework for rapid test chip development☆39Updated 4 years ago
- Basic floating-point components for RISC-V processors☆62Updated 4 years ago
- ☆15Updated 3 years ago
- vector multiplication adder accelerator (using chisel 3 and RocketChip RoCC ) 向量乘法累加加速器☆49Updated 4 years ago
- Tests for example Rocket Custom Coprocessors☆69Updated 4 years ago
- ☆74Updated 2 years ago
- ☆21Updated 4 years ago
- Port fpga-zynq (rocket-chip) to Xilinx ZYNQ Ultrascale+ board (ZCU102)☆54Updated last year
- ☆64Updated 2 years ago
- ⛔ DEPRECATED ⛔ RISC-V manycore accelerator for HERO, bigPULP hardware platform☆50Updated 2 years ago
- DEPRECATED. Please use Chipyard (https://github.com/ucb-bar/chipyard) to build BOOM☆35Updated 5 years ago
- A DSL for Systolic Arrays☆78Updated 5 years ago
- Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…☆94Updated last year
- Support for Rocket Chip on Zynq FPGAs☆39Updated 5 years ago
- A 32-bit RISC-V Processor Designed with High-Level Synthesis☆47Updated 4 years ago
- Floating point modules for CHISEL☆28Updated 10 years ago
- PLCT实验室 rvv-llvm 实现配套的 benchmark / testcases☆21Updated 3 years ago
- Matchlib Connections Library - latency insensitive channels (from NVlabs/matchlib/connections)☆36Updated 2 months ago
- HLS for Networks-on-Chip☆30Updated 3 years ago
- Provides the hardware code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerator…☆24Updated 4 years ago
- Digital Hardware Modelling using VHDL, Verilog, SystemVerilog, SystemC, HLS(C++, OpenCL)☆59Updated 3 years ago
- upstream: https://github.com/RALC88/gem5☆32Updated last year
- ☆31Updated last month
- A template for building new projects/platforms using the BOOM core.☆24Updated 5 years ago
- Fork of seldridge/rocket-rocc-examples with tests for a systolic array based matmul accelerator☆52Updated this week
- NOCulator is a network-on-chip simulator providing cycle-accurate performance models for a wide variety of networks (mesh, torus, ring, h…☆22Updated last year
- Project repo for the POSH on-chip network generator☆43Updated last year
- A lightweight core for the CV32E40 implementing the RISC-V vector extension specification. (v0.8)☆30Updated 3 years ago