ucb-bar / hwacha-templateLinks
Template for projects using the Hwacha data-parallel accelerator
☆34Updated 4 years ago
Alternatives and similar repositories for hwacha-template
Users that are interested in hwacha-template are comparing it to the libraries listed below
Sorting:
- Basic floating-point components for RISC-V processors☆66Updated 5 years ago
- vector multiplication adder accelerator (using chisel 3 and RocketChip RoCC ) 向量乘法累加加速器☆53Updated 5 years ago
- C/Assembly macros for talking with Rocket Custom Coprocessors (RoCCs)☆54Updated 5 years ago
- ☆66Updated 3 years ago
- Tests for example Rocket Custom Coprocessors☆75Updated 5 years ago
- CHIPKIT: An agile, reusable open-source framework for rapid test chip development☆41Updated 5 years ago
- ☆22Updated 4 years ago
- A DSL for Systolic Arrays☆80Updated 6 years ago
- Floating point modules for CHISEL☆31Updated 10 years ago
- Public release☆57Updated 5 years ago
- Provides the hardware code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerator…☆24Updated 5 years ago
- Simple MIDAS Examples☆12Updated 6 years ago
- Next generation CGRA generator☆113Updated 3 weeks ago
- Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…☆111Updated last year
- FlexGripPlus: an open-source GPU model for reliability evaluation and micro architectural simulation☆108Updated 2 years ago
- ☆81Updated last year
- ☆88Updated 2 years ago
- For contributions of Chisel IP to the chisel community.☆65Updated 9 months ago
- Project repo for the POSH on-chip network generator☆49Updated 5 months ago
- Microarchitecture implementation of the decoupled vector-fetch accelerator☆154Updated last year
- ☆83Updated last year
- Replace original DRAM model in GPGPU-sim with Ramulator DRAM model☆18Updated 6 years ago
- A vector processor implemented in Chisel☆21Updated 11 years ago
- Fork of seldridge/rocket-rocc-examples with tests for a systolic array based matmul accelerator☆60Updated last month
- Linear algebra accelerators for RISC-V (published in ICCD 17)☆66Updated 7 years ago
- ⛔ DEPRECATED ⛔ RISC-V manycore accelerator for HERO, bigPULP hardware platform☆51Updated 3 years ago
- ☆72Updated last week
- FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks☆46Updated 5 months ago
- openHMC - an open source Hybrid Memory Cube Controller☆48Updated 9 years ago
- CNN accelerator☆27Updated 8 years ago