arkhadem / aim_simulatorLinks
A simulator for SK hynix AiM PIM architecture based on Ramulator 2.0
☆17Updated 4 months ago
Alternatives and similar repositories for aim_simulator
Users that are interested in aim_simulator are comparing it to the libraries listed below
Sorting:
- PIMeval simulator and PIMbench suite☆27Updated last week
- ☆16Updated 2 years ago
- Artifact for paper "PIM is All You Need: A CXL-Enabled GPU-Free System for LLM Inference", ASPLOS 2025☆63Updated last month
- MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator☆55Updated 3 years ago
- Artifact material for [HPCA 2025] #2108 "UniNDP: A Unified Compilation and Simulation Tool for Near DRAM Processing Architectures"☆24Updated 6 months ago
- ☆69Updated 11 months ago
- UPMEM LLM Framework allows profiling PyTorch layers and functions and simulate those layers/functions with a given hardware profile.☆29Updated this week
- mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)☆55Updated 5 months ago
- A Cycle-level simulator for M2NDP☆27Updated last month
- ☆25Updated 3 years ago
- ☆32Updated 5 months ago
- The simulator for SPADA, an SpGEMM accelerator with adaptive dataflow☆37Updated 2 years ago
- [ASPLOS 2024] CIM-MLC: A Multi-level Compilation Stack for Computing-In-Memory Accelerators☆36Updated last year
- PUMA Compiler☆29Updated 5 years ago
- ☆25Updated last year
- NeuPIMs: NPU-PIM Heterogeneous Acceleration for Batched LLM Inferencing☆83Updated 11 months ago
- ☆16Updated last year
- Processing in Memory Emulation☆20Updated 2 years ago
- ☆9Updated 11 months ago
- ☆9Updated last year
- [ASPLOS 2019] PUMA-simulator provides a detailed simulation model of a dataflow architecture built with NVM (non-volatile memory), and ru…☆64Updated 2 years ago
- HyFiSS: A Hybrid Fidelity Stall-Aware Simulator for GPGPUs☆34Updated 5 months ago
- MICRO22 artifact evaluation for Sparseloop☆43Updated 2 years ago
- A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)☆79Updated last year
- Hybrid Memory Cube Simulation & Research Infrastructure☆16Updated last year
- PIM-DL: Expanding the Applicability of Commodity DRAM-PIMs for Deep Learning via Algorithm-System Co-Optimization☆31Updated last year
- ☆12Updated last month
- A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching☆53Updated 2 months ago
- Heterogenous ML accelerator☆18Updated 3 weeks ago
- Serpens is an HBM FPGA accelerator for SpMV☆19Updated 10 months ago