menggg22 / CAMASim
A comprehensive content-addressable accelerator simulation framework.
☆15Updated 4 months ago
Alternatives and similar repositories for CAMASim:
Users that are interested in CAMASim are comparing it to the libraries listed below
- ☆12Updated last year
- ☆16Updated 2 years ago
- A Full-System Framework for Simulating NDP devices from Caches to DRAM☆16Updated last year
- NeuraChip Accelerator Simulator☆11Updated 11 months ago
- Heterogenous ML accelerator☆18Updated 6 months ago
- ☆25Updated 11 months ago
- STONNE Simulator integrated into SST Simulator☆18Updated 11 months ago
- ☆25Updated 3 years ago
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆71Updated 3 years ago
- ☆11Updated last year
- An HBM FPGA based SpMV Accelerator☆12Updated 7 months ago
- An end-to-end GCN inference accelerator written in HLS☆19Updated 2 years ago
- A Unified Framework for Training, Mapping and Simulation of ReRAM-Based Convolutional Neural Network Acceleration☆35Updated 2 years ago
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆45Updated 2 years ago
- DOSA: Differentiable Model-Based One-Loop Search for DNN Accelerators☆13Updated 5 months ago
- ☆32Updated 4 years ago
- ☆18Updated 8 months ago
- ☆10Updated 2 years ago
- Domain-Specific Architecture Generator 2☆21Updated 2 years ago
- A reference implementation of the Mind Mappings Framework.☆29Updated 3 years ago
- ☆33Updated 3 years ago
- [DATE 2022] PowerGear: Early-Stage Power Estimation in FPGA HLS via Heterogeneous Edge-Centric GNNs☆17Updated 2 years ago
- ☆13Updated 2 years ago
- An efficient spatial accelerator enabling hybrid sparse attention mechanisms for long sequences☆25Updated last year
- The simulator for SPADA, an SpGEMM accelerator with adaptive dataflow☆34Updated 2 years ago
- HLS project modeling various sparse accelerators.☆12Updated 3 years ago
- ☆39Updated 9 months ago
- DAC'22 paper: "Automated Accelerator Optimization Aided by Graph Neural Networks"☆40Updated last year
- Dynamically Reconfigurable Architecture Template and Cycle-level Microarchitecture Simulator for Dataflow AcCelerators☆28Updated last year
- Implementation of paper "GraphACT: Accelerating GCN Training on CPU-FPGA Heterogeneous Platform".☆10Updated 4 years ago