A course based on FINN with hands on Lectures, Examples and Labs to go from 0 to a full custom Quantized Neural Network running on your very own FPGA !
☆47Jul 3, 2025Updated last year
Alternatives and similar repositories for AI_to_FPGA_course
Users that are interested in AI_to_FPGA_course are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- [BRH YT CHANNEL] This repo contains all the code and ressources you need for the Zynq and other FPGA tutorials, ready to copy and paste.☆85Mar 31, 2026Updated 3 months ago
- ☆16Apr 3, 2026Updated 3 months ago
- Dataflow QNN inference accelerator examples on FPGAs☆261Mar 10, 2026Updated 4 months ago
- Learn how to build our own RV32I(M) core, verify it and actually use it FOR FREE (.md tutorials). From scratch & with more than 200 pages…☆471Updated this week
- Low-Precision YOLO on PYNQ with FINN☆38Nov 26, 2023Updated 2 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Deep Neural Network inference using Xilinx Zynq-7000 chip.☆29Jun 26, 2020Updated 6 years ago
- NeuraLUT-Assemble☆51Aug 20, 2025Updated 11 months ago
- Clock Fault Injector - Clock Glitching Attack with Chipwhisperer☆10Dec 26, 2024Updated last year
- Dataflow compiler for QNN inference on FPGAs☆1,035Updated this week
- Social Disatancing Monitor using yolov3 and DPU HW acceleration for Xilinx adaptive computing challenge 2020☆12Feb 17, 2023Updated 3 years ago
- Model zoo for the Quantized ONNX (QONNX) model format☆15Oct 31, 2025Updated 8 months ago
- Extremely basic CortexM0 SoC based on ARM DesignStart Eval☆28Oct 8, 2018Updated 7 years ago
- An implementation of a BinaryConnect network for cifar10☆11Nov 4, 2019Updated 6 years ago
- Project Peppercorn - GateMate FPGA Bitstream Documentation☆45Jun 16, 2026Updated last month
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Generate an FPGA design for a TWN☆11Nov 4, 2019Updated 6 years ago
- muSYCL, the SYCL musical!☆13Aug 25, 2024Updated last year
- This repository contains all the information studied and created during the FPGA - Fabric, Design and Architecture workshop. It is primar…☆44Mar 28, 2022Updated 4 years ago
- Python script for generating Xilinx .coe files for RAM initializing☆20Jan 3, 2019Updated 7 years ago
- Repository for work on on Xilinx's matrix vector activation unit's RTL implementation. Documentation available at: https://asadalam.githu…☆20Jan 21, 2022Updated 4 years ago
- Pruning methods for pytorch with an optimizer-like interface☆15Apr 14, 2020Updated 6 years ago
- FINN+ is an extended version of FINN, a dataflow compiler for QNN inference on FPGAs. It is maintained by a group of researchers at Pader…☆54Updated this week
- Low Precision(quantized) Yolov5☆48Mar 24, 2025Updated last year
- Classify modulation of signals☆16Jan 16, 2020Updated 6 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Z-Core - A Lightweight RISC-V Processor (RV32IMZicsr)☆15Jun 26, 2026Updated last month
- 5 stage pipeline implementation of RISC-V 32I Processor.☆10Nov 27, 2024Updated last year
- A compact, configurable RISC-V core☆13Jul 31, 2025Updated 11 months ago
- Learn RISC-V☆22Dec 5, 2024Updated last year
- 2 Week digital VLSI SoC design and planning workshop with complete RTL2GDSII flow organised by VSD in collaboration with NASSCOM (Advance…☆72Apr 13, 2024Updated 2 years ago
- Using verilog to implement MAC (Multiply Accumulate) . Verifying it by testbench .☆16Feb 17, 2019Updated 7 years ago
- SystemVerilog files for lab project on a DNN hardware accelerator☆18Jun 22, 2021Updated 5 years ago
- CVA6 softcore contest☆23Jul 8, 2026Updated 3 weeks ago
- Analysis tool to assess (HW/SW) system security against fault-injection attacks☆21Jul 21, 2026Updated last week
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- RFSoC Spectrum Analyser Module on PYNQ.☆93Jul 7, 2026Updated 3 weeks ago
- LiteX-based gateware for LimeSDR boards.☆22Updated this week
- An Open Workflow to Build Custom SoCs and run Deep Models at the Edge☆126Jun 18, 2026Updated last month
- Learning Path: RISC-V & Advanced Edge AI on SiFive FE310-G002 SoC | 32-bit RISC-V | 320 MHz | 16KB L1 Instruction Cache | 128Mbit (16MB) …☆12Sep 18, 2025Updated 10 months ago
- Example project for the BRS-100-GW1NR9 FPGA development board.☆19Jul 9, 2026Updated 2 weeks ago
- 🚀 Real-Time High-Level Synthesis (HLS) Projects for UltraScale+ FPGAs. Accelerated design pipelines, dataflow architectures, and low-lat…☆15Aug 25, 2025Updated 11 months ago
- SystemVerilog RTL Linter for YoSys☆24Nov 22, 2024Updated last year