MicrochipTech / fpga-hls-examples
Open-Source HLS Examples for Microchip FPGAs
☆44Updated 2 weeks ago
Alternatives and similar repositories for fpga-hls-examples:
Users that are interested in fpga-hls-examples are comparing it to the libraries listed below
- PYNQ Composabe Overlays☆71Updated 10 months ago
- IEEE 754 single and double precision floating point library in systemverilog and vhdl☆65Updated 4 months ago
- Educational verilog library that supports IEEE754 floating point arithmetic with a parametrizable mantissa and exponent☆26Updated last month
- ☆55Updated 4 years ago
- Contains FPGA benchmarks for Vivado HLS and Catapult HLS☆25Updated 4 years ago
- Simple examples for FPGA design using Vivado HLS for high level synthesis and Vivado for bitstream generation.☆30Updated 5 years ago
- Digital Hardware Modelling using VHDL, Verilog, SystemVerilog, SystemC, HLS(C++, OpenCL)☆65Updated 2 months ago
- PYNQ-ZU, AUP UltraScale+ MPSoC academic board☆23Updated 2 weeks ago
- An Open Workflow to Build Custom SoCs and run Deep Models at the Edge☆76Updated last week
- ☆25Updated 3 years ago
- Introductory examples for using PYNQ with Alveo☆51Updated 2 years ago
- Python/C/RTL cosimulation with Xilinx's xsim simulator☆65Updated 8 months ago
- A PYNQ overlay demonstrating Pythonic DSP running on Zynq UltraScale+☆39Updated 2 years ago
- This store contains Configurable Example Designs.☆44Updated this week
- Generic FIFO implementation with optional FWFT☆57Updated 4 years ago
- Mathematical Functions in Verilog☆92Updated 4 years ago
- ☆91Updated 10 months ago
- a hardware design library based on SpinalHDL, especially for stream processing operators on Xilinx FPGAs for Arithmetic, DSP, Communicati…☆62Updated last year
- This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems u…☆51Updated 6 years ago
- CHIPKIT: An agile, reusable open-source framework for rapid test chip development☆41Updated 4 years ago
- RISC-V ISA based 32-bit processor written in HLS☆17Updated 5 years ago
- IP operations in verilog (simulation and implementation on ice40)☆55Updated 5 years ago
- 16-bit Adder Multiplier hardware on Digilent Basys 3☆72Updated last year
- ☆25Updated 3 years ago
- The Verilog source code for DRUM approximate multiplier.☆30Updated 2 years ago
- A simple DDR3 memory controller☆54Updated 2 years ago
- This is a verilog implementation of 4x4 systolic array multiplier☆53Updated 4 years ago
- I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. …☆41Updated last year
- Extensible FPGA control platform☆60Updated 2 years ago
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆63Updated 5 years ago