PyTorch model to RTL flow for low latency inference
☆131Mar 15, 2024Updated 2 years ago
Alternatives and similar repositories for openhls
Users that are interested in openhls are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- 📥 🎯 (1,4/4) an MLIR-based toolchain with Vitis HLS LLVM input/output targeting FPGAs.☆15Nov 15, 2022Updated 3 years ago
- A hardware synthesis framework with multi-level paradigm☆44Jan 10, 2025Updated last year
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆97Sep 27, 2024Updated last year
- A scalable High-Level Synthesis framework on MLIR☆294May 15, 2024Updated last year
- Conversions to MLIR EmitC☆135Dec 12, 2024Updated last year
- Wordpress hosting with auto-scaling - Free Trial • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- CIRCT-based HLS compilation flows, debugging, and cosimulation tools.☆55Jul 17, 2023Updated 2 years ago
- Bridging polyhedral analysis tools to the MLIR framework☆119Sep 9, 2023Updated 2 years ago
- FPGA acceleration of arbitrary precision floating point computations.☆40May 17, 2022Updated 3 years ago
- HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Heterogeneous Computing (FPGA'19 Best Paper)☆339Apr 20, 2024Updated last year
- An LLVM pass to prove that an II works for the given loop for Vitis HLS☆11Aug 22, 2021Updated 4 years ago
- TAPA compiles task-parallel HLS program into high-performance FPGA accelerators. UCLA-maintained.☆187Mar 8, 2026Updated last month
- A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.☆336Jan 20, 2025Updated last year
- Allo Accelerator Design and Programming Framework (PLDI'24)☆370Mar 13, 2026Updated last month
- Binary Neural Network-based COVID-19 Face-Mask Wear and Positioning Predictor on Edge Devices☆12Jul 1, 2021Updated 4 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- A lightweight, Pythonic, frontend for MLIR☆80Oct 21, 2023Updated 2 years ago
- A stream to RTL compiler based on MLIR and CIRCT☆16Nov 15, 2022Updated 3 years ago
- Circuit IR Compilers and Tools☆2,082Updated this week
- MLIR+EqSat☆26Jan 10, 2026Updated 3 months ago
- ☆131Apr 9, 2026Updated last week
- Generate versal system design from ONNX model. AI engine kernels. Sub-microsecond speeds for autoencoders.☆17Dec 29, 2024Updated last year
- SAMO: Streaming Architecture Mapping Optimisation☆35Oct 4, 2023Updated 2 years ago
- PandA-bambu public repository☆320Feb 10, 2026Updated 2 months ago
- ☆19Dec 3, 2019Updated 6 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- HeteroCL-MLIR dialect for accelerator design☆42Sep 18, 2024Updated last year
- EQueue Dialect☆42Feb 3, 2022Updated 4 years ago
- AutoSA: Polyhedral-Based Systolic Array Compiler☆240Dec 8, 2022Updated 3 years ago
- [FPGA 2021, Best Paper Award] An automated floorplanning and pipelining tool for Vivado HLS.☆127Jan 3, 2023Updated 3 years ago
- XLS: Accelerated HW Synthesis☆1,469Updated this week
- An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.☆65Oct 9, 2024Updated last year
- The Next-gen Language & Compiler Powering Efficient Hardware Design☆36Jan 16, 2025Updated last year
- high-performance RTL simulator☆190Jun 19, 2024Updated last year
- Fast, Accurate and Convenient Light-Weight HLS Framework for Academic Design Space Exploration and Evaluation. (LLVM-11)☆62Mar 17, 2022Updated 4 years ago
- Deploy open-source AI quickly and easily - Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- ☆87Mar 5, 2024Updated 2 years ago
- Machine learning on FPGAs using HLS☆1,939Updated this week
- ☆17Feb 3, 2023Updated 3 years ago
- Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs (FPGA'18)☆170Nov 7, 2023Updated 2 years ago
- DFiant HDL (DFHDL): A Mutli-abstraction Hardware Descripition Language and Framework☆94Updated this week
- An MLIR-based toy DL compiler for TVM Relay.☆61Oct 16, 2022Updated 3 years ago
- A list of tutorials, paper, talks, and open-source projects for emerging compiler and architecture☆523Jan 15, 2025Updated last year