casper-astro / casperfpgaLinks
Software control for CASPER FPGAs
☆21Updated 3 months ago
Alternatives and similar repositories for casperfpga
Users that are interested in casperfpga are comparing it to the libraries listed below
Sorting:
- An RFSoC Frequency Planner developed using Python.☆31Updated 2 years ago
- Tutorials available here:☆37Updated 3 months ago
- Python productivity for RFSoC platforms☆85Updated last month
- The Strathclyde RFSoC Studio Installer for PYNQ.☆34Updated 2 years ago
- RFSoC Spectrum Analyser Module on PYNQ.☆89Updated last year
- PYNQ example of using the RFSoC as a QPSK transceiver.☆109Updated 2 years ago
- RFSoC2x2 board repo for PYNQ☆17Updated 3 years ago
- Board repo for the ZCU216 RFSOC☆31Updated 3 years ago
- A PYNQ overlay demonstrating AMD RFSoC Multi-Tile Synchronization (MTS).☆31Updated 2 years ago
- Firmware that implements a reliable high-performance control link for particle physics electronics, based on the IPbus protocol☆43Updated 3 weeks ago
- Demonstration of Automatic Gain Control with PYNQ☆16Updated 3 years ago
- ☆46Updated last month
- PYNQ example of an OFDM Transmitter and Receiver on RFSoC.☆57Updated 2 years ago
- PYNQ example of using the RFSoC as a QPSK/BPSK radio transceiver.☆40Updated 2 years ago
- Open-sourcing the PYNQ & RFSoC workshop materials☆63Updated 5 years ago
- RFSoC QSFP Data Offload Design with GNU Radio☆25Updated last year
- A collection of RFSoC introductory notebooks for PYNQ.☆25Updated 4 years ago
- RTL implementation of components for DVB-S2☆130Updated 2 years ago
- LBNL RF controls support HDL libraries. Mirroring LBNL's internal Gitlab repository, which is CI enabled☆100Updated this week
- A High-Throughput Oversampled Polyphase Filter Bank Using Vivado HLS and PYNQ on a RFSoC☆39Updated last year
- ☆19Updated 4 years ago
- ☆65Updated 3 months ago
- JESD204B core for Migen/MiSoC☆35Updated 4 years ago
- AMC module with Xilinx RF-SoC and two analog front-end mezzanines for SDR and quantum applications☆42Updated 3 years ago
- A basic Soft(Gate)ware Defined Radio architecture☆100Updated last year
- A PYNQ overlay demonstrating the Xilinx RFSoC SD-FEC☆13Updated 3 years ago
- ☆21Updated 8 months ago
- An FPGA-based 7-ENOB 600 MSample/s ADC without any External Components☆46Updated 4 years ago
- A repository of information and source files for toolflow-supported hardware☆31Updated 3 years ago
- A fast high-resolution time-to-digital converter in the Red Pitaya Zynq-7010 SoC☆69Updated 4 years ago