MazinLab / MKIDGen3Links
☆12Updated last month
Alternatives and similar repositories for MKIDGen3
Users that are interested in MKIDGen3 are comparing it to the libraries listed below
Sorting:
- Tutorials available here:☆37Updated 3 months ago
- A PYNQ overlay demonstrating AMD RFSoC Multi-Tile Synchronization (MTS).☆31Updated 2 years ago
- Open-sourcing the PYNQ & RFSoC workshop materials☆63Updated 5 years ago
- Board repo for the ZCU216 RFSOC☆30Updated 3 years ago
- Python productivity for RFSoC platforms☆84Updated last month
- PYNQ example of using the RFSoC as a QPSK transceiver.☆109Updated 2 years ago
- RFSoC2x2 board repo for PYNQ☆17Updated 3 years ago
- A PYNQ overlay demonstrating the Xilinx RFSoC SD-FEC☆13Updated 3 years ago
- A PYNQ overlay demonstrating Pythonic DSP running on Zynq UltraScale+☆40Updated 3 years ago
- An RFSoC Frequency Planner developed using Python.☆31Updated 2 years ago
- A collection of RFSoC introductory notebooks for PYNQ.☆24Updated 4 years ago
- A High-Throughput Oversampled Polyphase Filter Bank Using Vivado HLS and PYNQ on a RFSoC☆39Updated last year
- ☆19Updated 4 years ago
- RFSoC Spectrum Analyser Module on PYNQ.☆87Updated last year
- Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…☆78Updated 2 years ago
- Demonstration of Automatic Gain Control with PYNQ☆16Updated 3 years ago
- PYNQ example of an OFDM Transmitter and Receiver on RFSoC.☆56Updated 2 years ago
- Repository of Matlab tools for analysis of wireline signal integrity and transceiver simulation☆12Updated 5 years ago
- The Strathclyde RFSoC Studio Installer for PYNQ.☆34Updated 2 years ago
- FEC Codec IP core library for a some famous codes (BCH, RS, LDPC, Turbo)☆127Updated 3 weeks ago
- Board files to build the ZCU111 PYNQ image☆20Updated 3 years ago
- Simple examples for FPGA design using Vivado HLS for high level synthesis and Vivado for bitstream generation.☆31Updated 5 years ago
- IPbus Builder Tool☆14Updated 2 weeks ago
- Networking Overlay on PYNQ☆50Updated 6 years ago
- ☆35Updated 6 years ago
- Software control for CASPER FPGAs☆21Updated 3 months ago
- Companion Jupyter Notebooks for the RFSoC-Book.☆242Updated 2 years ago
- - Designed the LDPC decoder in the Matlab using the min-sum approach. - Designed quantized RTL in Verilog with the min-sum approach and …☆53Updated 8 years ago
- Vitis Model Composer Examples and Tutorials☆113Updated last week
- Reed Solomon Encoder and Decoder Digital IP☆21Updated 5 years ago