mitya1337 / Simple_I2C
Simple implementation of I2C interface written on Verilog and SystemC
☆42Updated 7 years ago
Alternatives and similar repositories for Simple_I2C:
Users that are interested in Simple_I2C are comparing it to the libraries listed below
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆63Updated 4 years ago
- A VerilogHDL MCU Core based ARMv6 Cortex-M0☆21Updated 5 years ago
- Python Tool for UVM Testbench Generation☆52Updated 11 months ago
- UART -> AXI Bridge☆60Updated 3 years ago
- Generic FIFO implementation with optional FWFT☆56Updated 4 years ago
- AXI4 and AXI4-Lite interface definitions☆92Updated 4 years ago
- This is the repository for the IEEE version of the book☆58Updated 4 years ago
- A set of Wishbone Controlled SPI Flash Controllers☆79Updated 2 years ago
- Designing means to communicate as an SPI master, being a part of AXI interface☆17Updated last year
- Asynchronous fifo in verilog☆33Updated 9 years ago
- Platform Level Interrupt Controller☆40Updated 11 months ago
- Parameterised Asynchronous AHB3-Lite to APB4 Bridge.☆42Updated 11 months ago
- I2C controller core☆39Updated 2 years ago
- General Purpose AXI Direct Memory Access☆49Updated 11 months ago
- SystemVerilog testbench for an Ethernet 10GE MAC core☆45Updated 9 years ago
- Contains the System Verilog description for a simplified USB host that implements the transaction, data-link, and physical layers of the …☆14Updated 10 years ago
- Pequeno (PQR5) is a 5-stage pipelined in-order RISC-V CPU Core compliant with RV32I ISA.☆68Updated this week
- 100 MB/s Ethernet MAC Layer Switch☆14Updated 10 years ago
- To design test bench of the APB protocol☆17Updated 4 years ago
- Xilinx AXI VIP example of use☆37Updated 3 years ago
- ☆38Updated last year
- A simple DDR3 memory controller☆54Updated 2 years ago
- Open-source high performance AXI4-based HyperRAM memory controller☆73Updated 2 years ago
- DMA Hardware Description with Verilog☆14Updated 5 years ago
- Basic RISC-V Test SoC☆121Updated 6 years ago
- SystemVerilog Direct Programming Interface (DPI) Tutorial☆58Updated 4 years ago
- Ethernet MAC 10/100 Mbps☆79Updated 5 years ago
- The controller is a Verilog implementation through a state machine structure per Micro datasheet specifications, and connected to a prede…☆22Updated 6 years ago
- Hamming ECC Encoder and Decoder to protect memories☆32Updated 2 months ago
- ☆58Updated 2 years ago