sergachev / spi_mem_programmerLinks
Small (Q)SPI flash memory programmer in Verilog
☆68Updated 3 years ago
Alternatives and similar repositories for spi_mem_programmer
Users that are interested in spi_mem_programmer are comparing it to the libraries listed below
Sorting:
- A set of Wishbone Controlled SPI Flash Controllers☆95Updated 3 years ago
- DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow vi…☆85Updated last year
- Minimal DVI / HDMI Framebuffer☆83Updated 5 years ago
- Open-source high performance AXI4-based HyperRAM memory controller☆81Updated 3 years ago
- USB 2.0 Device IP Core☆73Updated 8 years ago
- WISHBONE SD Card Controller IP Core☆130Updated 3 years ago
- Verilog wishbone components☆123Updated 2 years ago
- SPI-Flash XIP Interface (Verilog)☆48Updated 4 years ago
- UART -> AXI Bridge☆69Updated 4 years ago
- TCP/IP controlled VPI JTAG Interface.☆69Updated 11 months ago
- Wishbone interconnect utilities☆44Updated 3 weeks ago
- Ethernet MAC 10/100 Mbps☆83Updated 6 years ago
- UART 16550 core☆38Updated 11 years ago
- Basic USB-CDC device core (Verilog)☆84Updated 4 years ago
- Sata 2 Host Controller for FPGA implementation☆18Updated 8 years ago
- Verilog SPI master and slave☆62Updated 10 years ago
- MIPI DSI controller☆82Updated 3 years ago
- A DDR3(L) PHY and controller, written in Verilog, for Xilinx 7-Series FPGAs☆78Updated 3 years ago
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆68Updated 5 years ago
- Basic USB 1.1 Host Controller for small FPGAs☆97Updated 5 years ago
- Verilog Repository for GIT☆35Updated 4 years ago
- FTDI FT600 SuperSpeed USB3.0 to AXI bus master☆97Updated 5 years ago
- A simple Verilog SPI master / slave implementation featuring all 4 modes.☆74Updated 5 years ago
- Collection of all FPGA related PSI libraries in the correct folder strucutre. Each library is included as submodule.☆42Updated 3 months ago
- USB Full Speed PHY☆48Updated 5 years ago
- Fully parametrizable combinatorial parallel LFSR/CRC module☆160Updated 10 months ago
- An SPI to AXI4-lite bridge for easy interfacing of airhdl register banks with any microcontroller.☆53Updated 2 years ago
- Two Verilog SPI module implementations (hard and soft) with advanced options and AXI Full Interface☆21Updated 8 years ago
- Verilog module to transmit/receive to/from RGMII compatible ethernet PHY☆30Updated 3 years ago
- ☆89Updated 8 years ago