256-bit vector processor based on the RISC-V vector (V) extension
☆33May 1, 2021Updated 5 years ago
Alternatives and similar repositories for RISC-V-Vector-Processor
Users that are interested in RISC-V-Vector-Processor are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Vector processor for RISC-V vector ISA☆145Oct 19, 2020Updated 5 years ago
- ☆15Sep 27, 2022Updated 3 years ago
- Basic Data Structure Algorithm in C++☆13Nov 4, 2022Updated 3 years ago
- Design, verification and ASIC implementation of a complete RISC-V CPU with: five stages pipeline, forwarding, automatic hazard detection,…☆17Apr 12, 2020Updated 6 years ago
- Systolic Array implementation for ASIC Course☆15Nov 26, 2023Updated 2 years ago
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- 本项目是一个基于RISC-V指令集架构的向量处理器(Vector Processing Unit, VPU)设计,旨在实现RISC-V向量扩展(RVV)规范中定义的向量运算功能。涵盖了处理器设计、计算机体系结构和硬件描述语言编程等多个领域的知识。☆20May 8, 2025Updated last year
- RISC-V Rocket on the Digilent Zybo Board☆21Aug 6, 2014Updated 12 years ago
- RISC-V by VectorBlox☆18Dec 14, 2015Updated 10 years ago
- Superscalar Out-of-Order NPU Design on FPGA☆16May 17, 2024Updated 2 years ago
- Two Level Cache Controller implementation in Verilog HDL☆66Jul 9, 2020Updated 6 years ago
- MAC system with IEEE754 compatibility☆14Nov 22, 2023Updated 2 years ago
- ☆15Aug 5, 2026Updated 3 weeks ago
- ☆14Jul 17, 2020Updated 6 years ago
- Implementation of a simple SIMD processor in Verilog, core of which is a 16-bit SIMD ALU. 2's compliment calculations are implemented in …☆157Jul 17, 2022Updated 4 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- A risc v based architecture to develop a core/ processor which is capable of Matrix MAC Operations☆13May 31, 2026Updated 2 months ago
- verilog/FPGA hardware description for very simple GPU☆17Apr 9, 2019Updated 7 years ago
- FPGA raycaster engine written in verilog☆14Apr 19, 2019Updated 7 years ago
- Present Crypto Engine in Verilog☆12Feb 27, 2016Updated 10 years ago
- Theia: ray graphic processing unit☆20Jul 17, 2014Updated 12 years ago
- The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 …☆539Aug 19, 2026Updated last week
- RTL code of some arbitration algorithm☆17Aug 25, 2019Updated 7 years ago
- This repo contains source files and code for a synthesizable RISC-V processor with support for custom instructions in a co-processor.☆12Aug 19, 2018Updated 8 years ago
- 2-8bit weights, 8-bit activations flexible Neural Processing Engine for PULP clusters☆39May 20, 2026Updated 3 months ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- IPs for data-plane integration of Hardware Processing Engines (HWPEs) within a PULP system☆21Aug 19, 2026Updated last week
- Design and simulate a simplified ARM single-cycle processor using SystemVerilog.☆10Sep 13, 2019Updated 6 years ago
- A lightweight core for the CV32E40 implementing the RISC-V vector extension specification. (v0.8)☆35Jan 19, 2021Updated 5 years ago
- A tool for configuring Xilinx Spartan 3 FPGAs via FT232H-based USB-to-JTAG adapter☆18Dec 31, 2020Updated 5 years ago
- Reconfigurable Computing Lab, DESE, Indian Institiute of Science☆34Jun 22, 2024Updated 2 years ago
- Final Project for Digital Systems Design Course, Fall 2020☆17Jul 20, 2022Updated 4 years ago
- vector multiplication adder accelerator (using chisel 3 and RocketChip RoCC ) 向量乘法累加加速器☆54Apr 6, 2020Updated 6 years ago
- ☆48Updated this week
- Agile Hardware Design Course☆16Aug 15, 2026Updated 2 weeks ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- ☆13Apr 16, 2022Updated 4 years ago
- ☆10Oct 25, 2022Updated 3 years ago
- Andes Vector Extension support added to riscv-dv☆19May 29, 2020Updated 6 years ago
- A RISC-V 5-stage pipelined CPU that supports vector instructions. Tape-out with U18 technology.☆152Dec 2, 2019Updated 6 years ago
- System Verilog based RTL design of DMA controller for 8086 microprocessor based systems.☆30Mar 30, 2020Updated 6 years ago
- Implementing Different Adder Structures in Verilog☆77Sep 3, 2019Updated 6 years ago
- Replace original DRAM model in GPGPU-sim with Ramulator DRAM model☆22Dec 10, 2018Updated 7 years ago