Alternatives and similar repositories for scgallery

Users that are interested in scgallery are comparing it to the libraries listed below

• siliconcompiler / lambdapdk
  Library of open source Process Design Kits (PDKs)
  ☆50Updated this week
• os-fpga / FOEDAG
  Framework Open EDA Gui
  ☆68Updated 8 months ago
• IHP-GmbH / IHP-Open-DesignLib
  Open source designs developed with IHP 130nm BiCMOS Open Source PDK. Documentation at https://ihp-open-ip.readthedocs.io/en/latest/
  ☆57Updated last week
• grayresearch / CX
  Proposed RISC-V Composable Custom Extensions Specification
  ☆71Updated 2 months ago
• pulp-platform / cheshire-ihp130-o
  ☆49Updated 5 months ago
• aignacio / nox
  RISC-V Nox core
  ☆68Updated last month
• librelane / librelane
  ASIC implementation flow infrastructure
  ☆91Updated last week
• pulp-platform / croc
  A PULP SoC for education, easy to understand and extend with a full flow for a physical design.
  ☆135Updated last week
• efabless / volare
  Version manager (and builder) for the Google sky130 and gf180mcu open-source PDKs
  ☆70Updated 3 weeks ago
• lnis-uofu / TIGFET-10nm-PDK
  An open source PDK using TIGFET 10nm devices.
  ☆49Updated 2 years ago
• RIOSLaboratory / OpenRPDK28
  Open source process design kit for 28nm open process
  ☆60Updated last year
• lip6 / coriolis
  Coriolis VLSI EDA Tool (LIP6)
  ☆69Updated last month
• pulp-platform / svase
  ☆32Updated 7 months ago
• najaeda / naja
  Structural Netlist API (and more) for EDA post synthesis flow development
  ☆112Updated this week
• kiwih / qtcore-C1
  ☆45Updated 2 years ago
• pulp-platform / tech_cells_generic
  Technology dependent cells instantiated in the design for generic process (simulation, FPGA)
  ☆65Updated 7 months ago
• chipsalliance / yosys-f4pga-plugins
  Plugins for Yosys developed as part of the F4PGA project.
  ☆83Updated last year
• wulffern / tt06-sar
  SAR ADC on tiny tapeout
  ☆42Updated 7 months ago
• efabless / chipignite-resources
  ☆83Updated 2 years ago
• b224hisl / rioschip
  ☆33Updated 2 years ago
• os-fpga / Raptor
  Raptor end-to-end FPGA Compiler and GUI
  ☆84Updated 8 months ago
• openhwgroup / cva5
  The CORE-V CVA5 is an Application class 5-stage RISC-V CPU specifically targetting FPGA implementations.
  ☆120Updated last month
• google / globalfoundries-pdks
  Index of the fully open source process design kits (PDKs) maintained by Google for GlobalFoundries technologies.
  ☆48Updated 3 years ago
• chipsalliance / fpga-tool-perf
  FPGA tool performance profiling
  ☆102Updated last year
• pulp-platform / pulp_cluster
  The multi-core cluster of a PULP system.
  ☆108Updated last week
• mole99 / greyhound-ihp
  Greyhound on IHP SG13G2 0.13 μm BiCMOS process
  ☆54Updated last month
• efabless / mpw_precheck
  ☆42Updated 6 months ago
• FPGA-Systems / drawio-hdl-builder
  Drawio => VHDL and Verilog
  ☆57Updated last year
• taneroksuz / fpu
  IEEE 754 single and double precision floating point library in systemverilog and vhdl
  ☆68Updated 8 months ago
• The-OpenROAD-Project / megaboom
  ☆29Updated this week