projf / fpgatools
Tools for FPGA development.
☆44Updated last year
Alternatives and similar repositories for fpgatools:
Users that are interested in fpgatools are comparing it to the libraries listed below
- Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC☆84Updated 6 years ago
- Basic USB 1.1 Host Controller for small FPGAs☆88Updated 4 years ago
- Generic FPGA SDRAM controller, originally made for AS4C4M16SA☆79Updated 4 years ago
- Wishbone interconnect utilities☆38Updated 3 weeks ago
- A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs☆61Updated 6 years ago
- Wishbone controlled I2C controllers☆46Updated 3 months ago
- Example Verilog code for Ulx3s☆40Updated 2 years ago
- Minimal DVI / HDMI Framebuffer☆79Updated 4 years ago
- A set of Wishbone Controlled SPI Flash Controllers☆79Updated 2 years ago
- An open source FPGA PCI core & 8250-Compatible PCI UART core☆40Updated 4 years ago
- A collection of debugging busses developed and presented at zipcpu.com☆37Updated last year
- Reusable Verilog 2005 components for FPGA designs☆40Updated last week
- DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow vi…☆75Updated 10 months ago
- SoftCPU/SoC engine-V☆54Updated last year
- Another tiny RISC-V implementation☆54Updated 3 years ago
- Featherweight RISC-V implementation☆52Updated 3 years ago
- Using VexRiscv without installing Scala☆37Updated 3 years ago
- SDRAM controller optimized to a memory bandwidth of 316MB/s☆25Updated 3 years ago
- Miscellaneous ULX3S examples (advanced)☆76Updated this week
- A wishbone controlled scope for FPGA's☆77Updated last year
- Fully featured implementation of Inter-IC (I2C) bus master for FPGAs☆26Updated 4 years ago
- FTDI FT245 Style Synchronous/Asynchronous FIFO Bridge☆32Updated 3 years ago
- FPGA USB 1.1 Low-Speed Implementation☆33Updated 6 years ago
- A comparison of 1st and 2nd order sigma delta DAC for FPGA☆55Updated 4 years ago
- ♻️ Convert the NEORV32 processor into a synthesizable plain-Verilog netlist module using GHDL.☆74Updated this week
- CologneChip GateMate FPGA Module: GMM-7550☆21Updated last year
- Design to connect Lattice Ultraplus FPGA to LH154Q01 Display☆28Updated 6 years ago
- A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems☆43Updated 2 years ago
- FPGA based microcomputer sandbox for software and RTL experimentation☆53Updated this week
- Extensible FPGA control platform☆57Updated last year