open-power / snapLinks
CAPI SNAP Framework Hardware and Software
☆109Updated 4 years ago
Alternatives and similar repositories for snap
Users that are interested in snap are comparing it to the libraries listed below
Sorting:
- OpenCAPI Acceleration Framework: develop an accelerator with OpenCAPI technology☆71Updated 11 months ago
- Basic Building Blocks (BBB) for OPAE-managed Intel FPGAs☆104Updated 6 months ago
- The Task Parallel System Composer (TaPaSCo)☆111Updated 2 months ago
- ☆88Updated 2 years ago
- Connectal is a framework for software-driven hardware development.☆171Updated last year
- Open Application-Specific Instruction Set processor tools (OpenASIP)☆162Updated last month
- Limago: an FPGA-based Open-source 100 GbE TCP/IP Stack☆127Updated 3 years ago
- openHMC - an open source Hybrid Memory Cube Controller☆48Updated 9 years ago
- Software workload management tool for RISC-V based SoC research. This is the default workload management tool for Chipyard and FireSim.☆85Updated 2 months ago
- Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…☆110Updated last year
- OmniXtend cache coherence protocol☆82Updated last month
- Dynamically Allocated Neural Network Accelerator for the RISC-V Rocket Microprocessor in Chisel☆213Updated 5 years ago
- ⛔ DEPRECATED ⛔ RISC-V manycore accelerator for HERO, bigPULP hardware platform☆51Updated 3 years ago
- SoftMC is an experimental FPGA-based memory controller design that can be used to develop tests for DDR3 SODIMMs using a C++ based API. T…☆136Updated last year
- Linear algebra accelerators for RISC-V (published in ICCD 17)☆66Updated 7 years ago
- PCIe library for the Xilinx 7 series FPGAs in the Bluespec language☆80Updated 3 years ago
- AXI Adapter(s) for RISC-V Atomic Operations☆66Updated 2 months ago
- AMD OpenNIC driver includes the Linux kernel driver☆67Updated 7 months ago
- Advanced Interface Bus (AIB) die-to-die hardware open source☆140Updated 10 months ago
- Port fpga-zynq (rocket-chip) to Xilinx ZYNQ Ultrascale+ board (ZCU102)☆62Updated 2 years ago
- ☆81Updated last year
- Hands-on experience using the Vitis unified software platform with Xilinx FPGA hardware☆48Updated last year
- RISC-V Rocket Core on Parallella & ZedBoard Zynq FPGA Boards☆102Updated 6 years ago
- Power Service Layer Simulation Engine☆29Updated 3 years ago
- pcie-bench code for NetFPGA/VCU709 cards☆37Updated 7 years ago
- Riscy Processors - Open-Sourced RISC-V Processors☆73Updated 6 years ago
- The Shang high-level synthesis framework☆120Updated 11 years ago
- Support for Rocket Chip on Zynq FPGAs☆40Updated 6 years ago
- An open source high level synthesis (HLS) tool built on top of LLVM☆124Updated last year
- [FPGA 2022, Best Paper Award] Parallel placement and routing of Vivado HLS dataflow designs.☆126Updated 2 years ago