open-power / snapLinks
CAPI SNAP Framework Hardware and Software
☆110Updated 4 years ago
Alternatives and similar repositories for snap
Users that are interested in snap are comparing it to the libraries listed below
Sorting:
- Basic Building Blocks (BBB) for OPAE-managed Intel FPGAs☆104Updated 9 months ago
- OpenCAPI Acceleration Framework: develop an accelerator with OpenCAPI technology☆73Updated last year
- The Task Parallel System Composer (TaPaSCo)☆111Updated this week
- ☆88Updated 2 years ago
- Spector: An OpenCL FPGA Benchmark Suite☆48Updated 6 years ago
- openHMC - an open source Hybrid Memory Cube Controller☆50Updated 9 years ago
- Open Application-Specific Instruction Set processor tools (OpenASIP)☆166Updated last month
- Limago: an FPGA-based Open-source 100 GbE TCP/IP Stack☆133Updated 4 years ago
- Linear algebra accelerators for RISC-V (published in ICCD 17)☆67Updated 8 years ago
- Connectal is a framework for software-driven hardware development.☆176Updated 2 years ago
- Open Programmable Acceleration Engine☆265Updated 3 months ago
- pcie-bench code for NetFPGA/VCU709 cards☆41Updated 7 years ago
- OmniXtend cache coherence protocol☆82Updated 5 months ago
- Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…☆113Updated 2 years ago
- ⛔ DEPRECATED ⛔ RISC-V manycore accelerator for HERO, bigPULP hardware platform☆50Updated 3 years ago
- VNx: Vitis Network Examples☆155Updated 2 months ago
- PCIe library for the Xilinx 7 series FPGAs in the Bluespec language☆83Updated 3 years ago
- AMD OpenNIC driver includes the Linux kernel driver☆70Updated 10 months ago
- SDAccel Development Environment Tutorials☆110Updated 5 years ago
- Matrix Operation Library for FPGA https://xilinx.github.io/gemx/☆63Updated 6 years ago
- Introductory examples for using PYNQ with Alveo☆52Updated 2 years ago
- Distributed Accelerator OS☆64Updated 3 years ago
- OPAE porting to Xilinx FPGA devices.☆39Updated 5 years ago
- Software workload management tool for RISC-V based SoC research. This is the default workload management tool for Chipyard and FireSim.☆86Updated last month
- ☆24Updated 9 years ago
- Hands-on experience using the Vitis unified software platform with Xilinx FPGA hardware☆48Updated last year
- Alveo Collective Communication Library: MPI-like communication operations for Xilinx Alveo accelerators☆97Updated 4 months ago
- A home for Genesis2 sources.☆43Updated 4 months ago
- Caribou: Distributed Smart Storage built with FPGAs☆67Updated 7 years ago
- PsPIN: A RISC-V in-network accelerator for flexible high-performance low-power packet processing☆103Updated 2 years ago