Alternatives and similar repositories for oc-accel

Users that are interested in oc-accel are comparing it to the libraries listed below

• open-power / snap
  CAPI SNAP Framework Hardware and Software
  ☆110Updated 4 years ago
• pulp-platform / hero
  Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…
  ☆112Updated 2 years ago
• UCLA-VAST / RapidStream
  [FPGA 2022, Best Paper Award] Parallel placement and routing of Vivado HLS dataflow designs.
  ☆127Updated 2 years ago
• alexforencich / verilog-cam
  Verilog Content Addressable Memory Module
  ☆114Updated 3 years ago
• OPAE / intel-fpga-bbb
  Basic Building Blocks (BBB) for OPAE-managed Intel FPGAs
  ☆104Updated 8 months ago
• StanfordAHA / garnet
  Next generation CGRA generator
  ☆115Updated this week
• unihd-cag / openhmc
  openHMC - an open source Hybrid Memory Cube Controller
  ☆50Updated 9 years ago
• oprecomp / DDR4_controller
  ☆67Updated 4 years ago
• hpcn-uam / Limago
  Limago: an FPGA-based Open-source 100 GbE TCP/IP Stack
  ☆132Updated 4 years ago
• esa-tu-darmstadt / tapasco
  The Task Parallel System Composer (TaPaSCo)
  ☆110Updated 5 months ago
• FPGA-Research / fos
  FOS - FPGA Operating System
  ☆73Updated 5 years ago
• cpc / openasip
  Open Application-Specific Instruction Set processor tools (OpenASIP)
  ☆165Updated last week
• Xilinx / Alveo-PYNQ
  Introductory examples for using PYNQ with Alveo
  ☆52Updated 2 years ago
• StanfordVLSI / Genesis2
  A home for Genesis2 sources.
  ☆43Updated 3 months ago
• intel / aib-phy-hardware
  ☆67Updated 2 years ago
• lana555 / dynamatic
  ☆87Updated last year
• hyoukjun / OpenSMART
  Public release
  ☆56Updated 6 years ago
• seldridge / rocket-rocc-examples
  Tests for example Rocket Custom Coprocessors
  ☆75Updated 5 years ago
• optimsoc / optimsoc
  OpTiMSoC - A tiled SoC platform with a mesh NoC and OpenRISC CPU cores
  ☆86Updated 4 years ago
• Xilinx / pcie_qdma_ats_example
  ☆26Updated 4 years ago
• anikau31 / systemc-clang
  This is a Clang tool that parses SystemC models, and synthesizes Verilog from it.
  ☆88Updated last year
• cornell-zhang / rosetta
  Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs
  ☆167Updated last year
• pulp-platform / bigpulp
  ⛔ DEPRECATED ⛔ RISC-V manycore accelerator for HERO, bigPULP hardware platform
  ☆50Updated 3 years ago
• sld-columbia / hl5
  A 32-bit RISC-V Processor Designed with High-Level Synthesis
  ☆54Updated 5 years ago
• alexforencich / cocotbext-pcie
  PCI express simulation framework for Cocotb
  ☆179Updated last month
• chipsalliance / aib-phy-hardware
  Advanced Interface Bus (AIB) die-to-die hardware open source
  ☆140Updated last year
• RSPwFPGAs / opae-xilinx
  OPAE porting to Xilinx FPGA devices.
  ☆39Updated 5 years ago
• ccelio / chisel-style-guide
  A Style Guide for the Chisel Hardware Construction Language
  ☆108Updated 4 years ago
• fpgasystems / davos
  Distributed Accelerator OS
  ☆64Updated 3 years ago
• NVlabs / matchlib
  SystemC/C++ library of commonly-used hardware functions and components for HLS.
  ☆284Updated 2 weeks ago