OpenCAPI / oc-accelLinks
OpenCAPI Acceleration Framework: develop an accelerator with OpenCAPI technology
☆71Updated last year
Alternatives and similar repositories for oc-accel
Users that are interested in oc-accel are comparing it to the libraries listed below
Sorting:
- CAPI SNAP Framework Hardware and Software☆110Updated 4 years ago
- Verilog Content Addressable Memory Module☆110Updated 3 years ago
- Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…☆111Updated last year
- Limago: an FPGA-based Open-source 100 GbE TCP/IP Stack☆129Updated 4 years ago
- Basic Building Blocks (BBB) for OPAE-managed Intel FPGAs☆104Updated 7 months ago
- openHMC - an open source Hybrid Memory Cube Controller☆50Updated 9 years ago
- [FPGA 2022, Best Paper Award] Parallel placement and routing of Vivado HLS dataflow designs.☆127Updated 2 years ago
- Next generation CGRA generator☆114Updated this week
- OpTiMSoC - A tiled SoC platform with a mesh NoC and OpenRISC CPU cores☆85Updated 4 years ago
- AXI Adapter(s) for RISC-V Atomic Operations☆66Updated last week
- Open Application-Specific Instruction Set processor tools (OpenASIP)☆163Updated this week
- The Task Parallel System Composer (TaPaSCo)☆111Updated 4 months ago
- Advanced Interface Bus (AIB) die-to-die hardware open source☆140Updated 11 months ago
- ☆64Updated 4 years ago
- A modular, parametrizable, and highly flexible Data Movement Accelerator (DMA)☆181Updated this week
- Introductory examples for using PYNQ with Alveo☆51Updated 2 years ago
- Basic floating-point components for RISC-V processors☆66Updated 5 years ago
- ☆81Updated last year
- A home for Genesis2 sources.☆42Updated 2 months ago
- ☆25Updated 4 years ago
- ☆78Updated 10 years ago
- Distributed Accelerator OS☆63Updated 3 years ago
- OPAE porting to Xilinx FPGA devices.☆39Updated 5 years ago
- AXI4 Full, Lite, and AxiStream verification components. AXI4 Interface Master, Responder, and Memory verification components. AxiStream t…☆140Updated this week
- RTL sources of the High-Performance L1 Dcache (HPDcache) for OpenHW CV cores☆90Updated 3 weeks ago
- Project repo for the POSH on-chip network generator☆50Updated 5 months ago
- ☆67Updated 2 years ago
- A 32-bit RISC-V Processor Designed with High-Level Synthesis☆54Updated 5 years ago
- OmniXtend cache coherence protocol☆82Updated 3 months ago
- Pure digital components of a UCIe controller☆67Updated 2 months ago