OpenCAPI / libocxl
LibOCXL is an access library which allows the user to implement a userspace driver for an OpenCAPI accelerator.
☆12Updated 10 months ago
Alternatives and similar repositories for libocxl:
Users that are interested in libocxl are comparing it to the libraries listed below
- CAPI SNAP Framework Hardware and Software☆110Updated 4 years ago
- Rodinia Benchmark Suite for OpenCL-based FPGAs☆31Updated 2 years ago
- OpenCAPI Acceleration Framework: develop an accelerator with OpenCAPI technology☆68Updated 8 months ago
- Power Service Layer Simulation Engine☆29Updated 3 years ago
- An example OpenCAPI 3.0 FPGA reference design for accelerator endpoint development☆13Updated 2 years ago
- OmniXtend cache coherence protocol☆82Updated 4 years ago
- ⛔ DEPRECATED ⛔ RISC-V manycore accelerator for HERO, bigPULP hardware platform☆51Updated 3 years ago
- Qbox☆51Updated last week
- Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…☆101Updated last year
- FPGA reference design for the the Swerv EH1 Core☆71Updated 5 years ago
- NVDLA modifications for GreenSocs qbox (https://git.greensocs.com/qemu/qbox)☆23Updated 6 years ago
- Basic Building Blocks (BBB) for OPAE-managed Intel FPGAs☆104Updated 3 months ago
- PsPIN: A RISC-V in-network accelerator for flexible high-performance low-power packet processing☆101Updated 2 years ago
- ☆46Updated this week
- QEMU libsystemctlm-soc co-simulation demos.☆144Updated 11 months ago
- Tools for analyzing and browsing Tarmac instruction traces.☆75Updated last month
- upstream: https://github.com/RALC88/gem5☆31Updated last year
- ☆87Updated 2 years ago
- ⛔ DEPRECATED ⛔ HERO Software Development Kit☆20Updated 3 years ago
- ☆86Updated 2 years ago
- Workshop on Computer Architecture Research with RISC-V (CARRV)☆39Updated 6 months ago
- Library to abstract the userspace cxl (CAPI) Linux kernel API☆35Updated 4 years ago
- Support for Rocket Chip on Zynq FPGAs☆40Updated 6 years ago
- ☆32Updated last year
- RISC-V Rocket Core on Parallella & ZedBoard Zynq FPGA Boards☆101Updated 6 years ago
- CVA6 SDK containing RISC-V tools and Buildroot☆65Updated 10 months ago
- VM-HDL Co-Simulation for Servers with PCIe-Connected FPGAs☆47Updated 4 years ago
- Microprobe: Microbenchmark generation framework☆21Updated 10 months ago
- ☆23Updated 4 years ago
- implement PCIE devices using C or VHDL and test them against a QEMU virtualized architecture☆102Updated 6 years ago