matt-alencar / fpga-uart-tx-rx
Basic UART TX/RX module for FPGA
☆30Updated 5 years ago
Related projects: ⓘ
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆57Updated 4 years ago
- A set of Wishbone Controlled SPI Flash Controllers☆72Updated last year
- Verilog modules required to get the OV7670 camera working☆60Updated 6 years ago
- configurable cordic core in verilog☆41Updated 10 years ago
- Verilog UART☆118Updated 11 years ago
- Verilog SPI master and slave☆45Updated 8 years ago
- A simple Verilog SPI master / slave implementation featuring all 4 modes.☆34Updated 3 years ago
- Simple 8-bit UART realization on Verilog HDL.☆75Updated 4 months ago
- Small (Q)SPI flash memory programmer in Verilog☆53Updated last year
- Asynchronous fifo using verilog and testbench using system verilog. For asynchronous Fifo design in different module.☆28Updated 3 years ago
- Interface Protocol in Verilog☆47Updated 5 years ago
- FPGA Camera Parallel & MIPI Verilog☆14Updated 7 months ago
- SPI Slave for FPGA in Verilog and VHDL☆169Updated 4 months ago
- SDRAM controller for MIPSfpga+ system☆20Updated 3 years ago
- A simple implementation of a UART modem in Verilog.☆95Updated 2 years ago
- Open-source high performance AXI4-based HyperRAM memory controller☆55Updated last year
- Basic RISC-V Test SoC☆102Updated 5 years ago
- UART -> AXI Bridge☆52Updated 3 years ago
- DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow vi…☆69Updated 5 months ago
- Video Stream Scaler☆39Updated 10 years ago
- Real-time streaming of OV7670 camera via VGA with a 640x480 resolution at 30fps☆49Updated 2 years ago
- A DDR3(L) PHY and controller, written in Verilog, for Xilinx 7-Series FPGAs☆58Updated last year
- RTL Verilog library for various DSP modules☆80Updated 2 years ago
- VHDL Modules☆23Updated 9 years ago
- Verilog implementation of a RISC-V core☆101Updated 5 years ago
- I2C controller core☆30Updated last year
- I2C Master and Slave☆28Updated 9 years ago
- Audio controller (I2S, SPDIF, DAC)☆77Updated 5 years ago
- SDRAM controller with AXI4 interface☆75Updated 5 years ago
- A picorv32-riscv Soc with DMAC and Ethernet controller & lwip & Kirtex7@333MHz☆66Updated 3 years ago