freecores / i2cLinks
I2C controller core
☆46Updated 2 years ago
Alternatives and similar repositories for i2c
Users that are interested in i2c are comparing it to the libraries listed below
Sorting:
- Ethernet MAC 10/100 Mbps☆84Updated 6 years ago
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆66Updated 5 years ago
- RTL Verilog library for various DSP modules☆91Updated 3 years ago
- UART -> AXI Bridge☆63Updated 4 years ago
- A set of Wishbone Controlled SPI Flash Controllers☆90Updated 3 years ago
- PCIE 5.0 Graduation project (Verification Team)☆85Updated last year
- Interface Protocol in Verilog☆50Updated 6 years ago
- 100 MB/s Ethernet MAC Layer Switch☆15Updated 11 years ago
- DDR2 memory controller written in Verilog☆78Updated 13 years ago
- Open-source high performance AXI4-based HyperRAM memory controller☆79Updated 3 years ago
- Fully parametrizable combinatorial parallel LFSR/CRC module☆157Updated 8 months ago
- AHB3-Lite Interconnect☆95Updated last year
- AXI4 and AXI4-Lite interface definitions☆96Updated 5 years ago
- Verilog UART☆184Updated 12 years ago
- MIPI I3C Basic v1.0 communication Slave source code in Verilog with BSD license to support use in sensors and other devices.☆129Updated 5 years ago
- Implementation of the PCIe physical layer☆50Updated 3 months ago
- Verilog SPI master and slave☆60Updated 9 years ago
- Ethernet 10GE MAC☆46Updated 11 years ago
- SDRAM controller with AXI4 interface☆98Updated 6 years ago
- Parameterised Asynchronous AHB3-Lite to APB4 Bridge.☆48Updated last year
- An SPI to AXI4-lite bridge for easy interfacing of airhdl register banks with any microcontroller.☆50Updated last year
- Basic RISC-V Test SoC☆157Updated 6 years ago
- Generic FIFO implementation with optional FWFT☆60Updated 5 years ago
- A picorv32-riscv Soc with DMAC and Ethernet controller & lwip & Kirtex7@333MHz☆75Updated 4 years ago
- Verilog based BCH encoder/decoder☆125Updated 3 years ago
- Verilog digital signal processing components☆158Updated 3 years ago
- AMBA bus generator including AXI, AHB, and APB☆107Updated 4 years ago
- The RTL desings for the AMBA APB3 Master and Generic Slave ( Memory Interface-able )☆17Updated 3 years ago
- ☆79Updated 3 years ago
- AHB DMA 32 / 64 bits☆56Updated 11 years ago