Alternatives and similar repositories for i2c

Users that are interested in i2c are comparing it to the libraries listed below

• freecores / ethmac
  Ethernet MAC 10/100 Mbps
  ☆81Updated 5 years ago
• ultraembedded / core_soc
  Basic Peripheral SoC (SPI, GPIO, Timer, UART)
  ☆63Updated 5 years ago
• ZipCPU / qspiflash
  A set of Wishbone Controlled SPI Flash Controllers
  ☆80Updated 2 years ago
• NXP / i3c-slave-design
  MIPI I3C Basic v1.0 communication Slave source code in Verilog with BSD license to support use in sensors and other devices.
  ☆126Updated 5 years ago
• dirjud / Nitro-Parts-lib-SPI
  Verilog SPI master and slave
  ☆53Updated 9 years ago
• ahmedshahein / DSP-RTL-Lib
  RTL Verilog library for various DSP modules
  ☆88Updated 3 years ago
• cjhonlyone / picorv32_Xilinx
  A picorv32-riscv Soc with DMAC and Ethernet controller & lwip & Kirtex7@333MHz
  ☆69Updated 3 years ago
• ultraembedded / core_dbg_bridge
  UART -> AXI Bridge
  ☆61Updated 3 years ago
• OVGN / OpenHBMC
  Open-source high performance AXI4-based HyperRAM memory controller
  ☆74Updated 2 years ago
• sunyata000 / PODES-M0O
  A VerilogHDL MCU Core based ARMv6 Cortex-M0
  ☆21Updated 5 years ago
• olofk / fifo
  Generic FIFO implementation with optional FWFT
  ☆57Updated 4 years ago
• adibis / DDR2_Controller
  DDR2 memory controller written in Verilog
  ☆78Updated 13 years ago
• www-asics-ws / usb2_dev
  USB 2.0 Device IP Core
  ☆67Updated 7 years ago
• ultraembedded / riscv_soc
  Basic RISC-V Test SoC
  ☆122Updated 6 years ago
• halftop / Interface-Protocol-in-Verilog
  Interface Protocol in Verilog
  ☆49Updated 5 years ago
• freecores / dma_ahb
  AHB DMA 32 / 64 bits
  ☆54Updated 10 years ago
• adki / gen_amba
  AMBA bus generator including AXI, AHB, and APB
  ☆100Updated 3 years ago
• mmxsrup / axi4-interface
  AXI4 and AXI4-Lite interface definitions
  ☆92Updated 4 years ago
• freecores / mac_layer_switch
  100 MB/s Ethernet MAC Layer Switch
  ☆15Updated 10 years ago
• Practical-UVM-Step-By-Step / Practical-UVM-IEEE-Edition
  This is the repository for the IEEE version of the book
  ☆58Updated 4 years ago
• janschiefer / verilog_spi
  A simple Verilog SPI master / slave implementation featuring all 4 modes.
  ☆53Updated 4 years ago
• bmartini / verilog-arbiter
  A look ahead, round-robing parametrized arbiter written in Verilog.
  ☆42Updated 4 years ago
• mgtm98 / pcie5_phy
  PCIE 5.0 Graduation project (Verification Team)
  ☆70Updated last year
• freecores / xge_mac
  Ethernet 10GE MAC
  ☆45Updated 10 years ago
• pulp-platform / pulp-riscv-gnu-toolchain
  ☆85Updated 2 months ago
• ultraembedded / core_sdram_axi4
  SDRAM controller with AXI4 interface
  ☆92Updated 5 years ago
• trondd / oc-i2c
  I2C controller core from Opencores.org
  ☆25Updated 13 years ago
• samy-maxvy / MAXVY_MIPI_I3C_Basic_Master_Controller_IP
  It is Gate level netlist of MAXVY's MIPI I3C Basic Master Controller IP along with APB interface support.
  ☆16Updated 5 years ago
• Lianghao-Yuan / AHB_Bus_Matrix
  ☆36Updated 9 years ago
• siorpaes / BareBonesCortexM0
  Extremely basic CortexM0 SoC based on ARM DesignStart Eval
  ☆26Updated 6 years ago