Alternatives and similar repositories for i2c

Users that are interested in i2c are comparing it to the libraries listed below

• freecores / ethmac
  Ethernet MAC 10/100 Mbps
  ☆84Updated 5 years ago
• ultraembedded / core_soc
  Basic Peripheral SoC (SPI, GPIO, Timer, UART)
  ☆65Updated 5 years ago
• alexforencich / verilog-lfsr
  Fully parametrizable combinatorial parallel LFSR/CRC module
  ☆154Updated 6 months ago
• RoaLogic / ahb3lite_interconnect
  AHB3-Lite Interconnect
  ☆90Updated last year
• ZipCPU / qspiflash
  A set of Wishbone Controlled SPI Flash Controllers
  ☆87Updated 2 years ago
• jamieiles / uart
  Verilog UART
  ☆178Updated 12 years ago
• NXP / i3c-slave-design
  MIPI I3C Basic v1.0 communication Slave source code in Verilog with BSD license to support use in sensors and other devices.
  ☆132Updated 5 years ago
• freecores / mac_layer_switch
  100 MB/s Ethernet MAC Layer Switch
  ☆15Updated 11 years ago
• ahmedshahein / DSP-RTL-Lib
  RTL Verilog library for various DSP modules
  ☆90Updated 3 years ago
• ultraembedded / riscv_soc
  Basic RISC-V Test SoC
  ☆140Updated 6 years ago
• mgtm98 / pcie5_phy
  PCIE 5.0 Graduation project (Verification Team)
  ☆79Updated last year
• adibis / DDR2_Controller
  DDR2 memory controller written in Verilog
  ☆77Updated 13 years ago
• adki / gen_amba
  AMBA bus generator including AXI, AHB, and APB
  ☆106Updated 4 years ago
• mmxsrup / axi4-interface
  AXI4 and AXI4-Lite interface definitions
  ☆94Updated 4 years ago
• ultraembedded / core_dbg_bridge
  UART -> AXI Bridge
  ☆63Updated 4 years ago
• RoaLogic / ahb3lite_apb_bridge
  Parameterised Asynchronous AHB3-Lite to APB4 Bridge.
  ☆45Updated last year
• dirjud / Nitro-Parts-lib-SPI
  Verilog SPI master and slave
  ☆57Updated 9 years ago
• russdill / bch_verilog
  Verilog based BCH encoder/decoder
  ☆123Updated 2 years ago
• alexforencich / verilog-dsp
  Verilog digital signal processing components
  ☆151Updated 2 years ago
• freecores / xge_mac
  Ethernet 10GE MAC
  ☆45Updated 11 years ago
• olofk / fifo
  Generic FIFO implementation with optional FWFT
  ☆60Updated 5 years ago
• cjhonlyone / picorv32_Xilinx
  A picorv32-riscv Soc with DMAC and Ethernet controller & lwip & Kirtex7@333MHz
  ☆72Updated 4 years ago
• ultraembedded / core_sdram_axi4
  SDRAM controller with AXI4 interface
  ☆96Updated 6 years ago
• buttercutter / DDR
  A simple DDR3 memory controller
  ☆59Updated 2 years ago
• OVGN / OpenHBMC
  Open-source high performance AXI4-based HyperRAM memory controller
  ☆77Updated 2 years ago
• halftop / Interface-Protocol-in-Verilog
  Interface Protocol in Verilog
  ☆50Updated 6 years ago
• sunyata000 / PODES-M0O
  A VerilogHDL MCU Core based ARMv6 Cortex-M0
  ☆21Updated 5 years ago
• Anthon1e / JESD204B-Transport-and-Data-Link-Layer
  Implementation of JESD204B Transport Layer & part of Data Link Layer
  ☆38Updated 4 years ago
• antmicro / nvme-verilog-pcie
  ☆76Updated 3 years ago
• Practical-UVM-Step-By-Step / Practical-UVM-IEEE-Edition
  This is the repository for the IEEE version of the book
  ☆70Updated 4 years ago