janschiefer / verilog_spiLinks
A simple Verilog SPI master / slave implementation featuring all 4 modes.
☆59Updated 4 years ago
Alternatives and similar repositories for verilog_spi
Users that are interested in verilog_spi are comparing it to the libraries listed below
Sorting:
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆64Updated 5 years ago
- Verilog SPI master and slave☆57Updated 9 years ago
- UART -> AXI Bridge☆61Updated 4 years ago
- Open-source high performance AXI4-based HyperRAM memory controller☆75Updated 2 years ago
- An SPI to AXI4-lite bridge for easy interfacing of airhdl register banks with any microcontroller.☆49Updated last year
- Basic USB-CDC device core (Verilog)☆80Updated 4 years ago
- FTDI FT600 SuperSpeed USB3.0 to AXI bus master☆94Updated 5 years ago
- A DDR3(L) PHY and controller, written in Verilog, for Xilinx 7-Series FPGAs☆73Updated 2 years ago
- Verilog module to transmit/receive to/from RGMII compatible ethernet PHY☆28Updated 2 years ago
- Fully parametrizable combinatorial parallel LFSR/CRC module☆152Updated 5 months ago
- I2C controller core☆47Updated 2 years ago
- A set of Wishbone Controlled SPI Flash Controllers☆84Updated 2 years ago
- Ethernet MAC 10/100 Mbps☆84Updated 5 years ago
- SPI-Flash XIP Interface (Verilog)☆40Updated 3 years ago
- SDRAM controller with AXI4 interface☆96Updated 5 years ago
- Interface Protocol in Verilog☆50Updated 6 years ago
- USB 2.0 Device IP Core☆68Updated 7 years ago
- Small (Q)SPI flash memory programmer in Verilog☆64Updated 2 years ago
- Collection of all FPGA related PSI libraries in the correct folder strucutre. Each library is included as submodule.☆36Updated last year
- Extremely basic CortexM0 SoC based on ARM DesignStart Eval☆27Updated 6 years ago
- DDR2 memory controller written in Verilog☆77Updated 13 years ago
- Verilog digital signal processing components☆146Updated 2 years ago
- SPI Slave for FPGA in Verilog and VHDL☆207Updated last year
- A VerilogHDL MCU Core based ARMv6 Cortex-M0☆21Updated 5 years ago
- ☆73Updated 3 years ago
- RTL Verilog library for various DSP modules☆89Updated 3 years ago
- IEEE P1735 decryptor for VHDL☆35Updated 10 years ago
- A collection of phase locked loop (PLL) related projects☆107Updated last year
- MIPI I3C Basic v1.0 communication Slave source code in Verilog with BSD license to support use in sensors and other devices.☆131Updated 5 years ago
- 10G Low Latency Ethernet☆56Updated 2 years ago