configurable cordic core in verilog
☆55Jul 17, 2014Updated 12 years ago
Alternatives and similar repositories for verilog_cordic_core
Users that are interested in verilog_cordic_core are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- The CORDIC algorithm implemented in Octave/MATLAB and Verilog☆32Mar 31, 2015Updated 11 years ago
- High Radix Adaptive CORDIC Algorithm - Improvement over Traditional CORDIC☆14Jul 15, 2016Updated 10 years ago
- FFT implementation using CORDIC algorithm written in Verilog.☆36Sep 6, 2018Updated 8 years ago
- DSP WishBone Compatible Cores☆14Jul 17, 2014Updated 12 years ago
- TransPimLib is a library for transcendental (and other hard-to-calculate) functions in general-purpose PIM systems, TransPimLib provides …☆15Apr 21, 2023Updated 3 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- ☆10Jun 13, 2017Updated 9 years ago
- Pipelined FFT/IFFT 256 points processor☆10Jul 17, 2014Updated 12 years ago
- PS2 interface☆18Dec 4, 2017Updated 8 years ago
- Audio controller (I2S, SPDIF, DAC)☆101Sep 1, 2019Updated 7 years ago
- A CORDIC implementation of square root Verilog calculation on Quartus Prime 16.0, with ability to simulate on ModelSim as well.☆19Jul 24, 2021Updated 5 years ago
- Implementation of CORDIC Algorithms Using Verilog☆27Apr 26, 2021Updated 5 years ago
- VGA LCD Core (OpenCores)☆15May 22, 2018Updated 8 years ago
- ☆12Aug 25, 2023Updated 3 years ago
- Reed Solomon Encoder and Decoder Digital IP☆22Jun 14, 2020Updated 6 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- This is about the implementation of (2,1,4) Convolutional Encoder and Viterbi Decoder using Verilog VHDL.☆13Aug 12, 2020Updated 6 years ago
- Quad SPI Flash XIP Controller with a direct mapped cache☆12Dec 9, 2020Updated 5 years ago
- Git简易博客☆17May 1, 2022Updated 4 years ago
- FIR filter implementation☆29Mar 19, 2020Updated 6 years ago
- NoC based MPSoC☆11Jul 17, 2014Updated 12 years ago
- Video Stream Scaler☆43Jul 17, 2014Updated 12 years ago
- AXI master to AHB slave, support INCR/WRAP, out of standing, do not advanced feature such as support out of order, retry, split, etc☆41Mar 17, 2022Updated 4 years ago
- A series of CORDIC related projects☆128Nov 12, 2024Updated last year
- A low-power, low-cost, highly-portable software defined radio platform.☆20Feb 19, 2018Updated 8 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- An Verilog implementation of 7-to-1 LVDS Serializer. Which can be used for comunicating FPGAs with LVDS TFT Screens.☆54Nov 23, 2013Updated 12 years ago
- ☆10Jan 25, 2023Updated 3 years ago
- My kicad library (pcb symbols needs extended layer support)☆13Apr 24, 2014Updated 12 years ago
- ☆20Jun 5, 2018Updated 8 years ago
- USB2.0 Verilog☆20Apr 21, 2019Updated 7 years ago
- Gigabit MAC + UDP/TCP/IP offload Engine☆35Sep 17, 2019Updated 7 years ago
- A pipelined cordic algoithm for computing cos(angle) and sin(angle) in verilog☆19May 29, 2017Updated 9 years ago
- QSPI for SoC☆24Nov 8, 2019Updated 6 years ago
- Implementation of pipelined IIR bandstop filter in Verilog, C++ and MATLAB with fixed point arithmetic☆33May 6, 2017Updated 9 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ☆19Dec 19, 2018Updated 7 years ago
- Andes Vector Extension support added to riscv-dv☆19May 29, 2020Updated 6 years ago
- Arline Quantum is an open-source library providing basic functionality for creating and manipulating quantum circuits. It also contains a…☆16Jan 1, 2024Updated 2 years ago
- Fixed Point Math Library for Verilog☆151Jul 17, 2014Updated 12 years ago
- Voice Recognition using FPGA-Based Neural Networks☆15Jul 6, 2016Updated 10 years ago
- This is a circular buffer controller used in FPGA.☆36Jan 12, 2016Updated 10 years ago
- 国产全志平头哥C906 RISC-V DongshanPI-D1s RV64GVC 裸机示例仓库!☆18May 9, 2024Updated 2 years ago