maltanar / qnn-inference-examplesLinks
Jupyter notebook examples on image classification with quantized neural networks
☆71Updated 5 years ago
Alternatives and similar repositories for qnn-inference-examples
Users that are interested in qnn-inference-examples are comparing it to the libraries listed below
Sorting:
- Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ☆59Updated 4 years ago
- ☆91Updated 5 years ago
- Open Source Specialized Computing Stack for Accelerating Deep Neural Networks.☆226Updated 6 years ago
- ☆64Updated 5 years ago
- This is a collection of works on neural networks and neural accelerators.☆41Updated 6 years ago
- BISMO: A Scalable Bit-Serial Matrix Multiplication Overlay for Reconfigurable Computing☆147Updated 5 years ago
- Open Source Compiler Framework using ONNX as Frontend and IR☆33Updated 3 years ago
- Training and Implementation of a CNN for image classification with binary weights and activations on FPGA with HLS tools☆52Updated 7 years ago
- PYNQ, Neural network Language model, Overlay☆112Updated 6 years ago
- Dataflow QNN inference accelerator examples on FPGAs☆239Updated 3 months ago
- Vitis HLS Library for FINN☆210Updated last week
- Residual Binarized Neural Network☆43Updated 7 years ago
- ☆32Updated last year
- System Verilog code describing a fully combinational binarized neural network.☆34Updated 7 years ago
- Models and examples built with hls4ml☆12Updated 5 years ago
- An LSTM template and a few examples using Vivado HLS☆46Updated last year
- Generator of verilog description for FPGA MobileNet implementation☆179Updated 3 years ago
- Linear model training using stochastic gradient descent (SGD) on PYNQ with full to low precision.☆55Updated 8 years ago
- FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)☆281Updated 6 years ago
- Fast inference of Boosted Decision Trees in FPGAs☆57Updated last month
- This repository contains a "Hello World" introduction application to the Xilinx PYNQ framework.☆107Updated 3 years ago
- Train and deploy LUT-based neural networks on FPGAs☆108Updated last year
- The 1st place winner's source codes for DAC 2018 System Design Contest, FPGA Track☆91Updated 7 years ago
- Approximate layers - TensorFlow extension☆26Updated 8 months ago
- SAMO: Streaming Architecture Mapping Optimisation☆34Updated 2 years ago
- A tool to deploy Deep Neural Networks on PULP-based SoC's☆91Updated 4 months ago
- Light-weighted neural network inference for object detection on small-scale FPGA board☆93Updated 6 years ago
- Example of Tiny YOLO deployed using Xilinx BNN-PYNQ.☆31Updated 6 years ago
- Squeezenet V1.1 on Cyclone V SoC-FPGA at 450ms/image, 20x faster than ARM A9 processor alone. A project for 2017 Innovate FPGA design con…☆113Updated 7 years ago
- Simple examples for FPGA design using Vivado HLS for high level synthesis and Vivado for bitstream generation.☆31Updated 5 years ago