lowRISC/lowrisc-nexys4 external links

---

GitHub - View repository

GitHub.dev - Open in online code editor

Star history - Growth chart over time

deps.dev - Dependencies and security vulnerabilities

Gitingest - Export source code for LLM usage

Repomix - Export source code for LLM usage

uithub - Export source code for LLM usage

Close

lowRISC/lowrisc-nexys4

Readme badge preview -

If you own this repo, copy the snippet below and add it to your README.md

---

Copy

[![RelatedRepos](https://img.shields.io/badge/related-repos-yellow)](https://relatedrepos.com/gh/lowRISC/lowrisc-nexys4)

Close

lowRISC / lowrisc-nexys4View on GitHubMore

• External links
• Readme badge

FPGA demo for Digilent NEXYS 4 board

☆22Oct 2, 2019Updated 6 years ago

Alternatives and similar repositories for lowrisc-nexys4

Users that are interested in lowrisc-nexys4 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.

• lowRISC / lowrisc-fpga

  View on GitHub
  Untethered (stand-alone) FPGA implementation of the lowRISC SoC
  ☆55Oct 2, 2019Updated 6 years ago
• lowRISC / lowrisc-chip

  View on GitHub
  The root repo for lowRISC project and FPGA demos.
  ☆600Aug 3, 2023Updated 2 years ago
• DigilentChina / Freedom_on_Nexys_A7

  View on GitHub
  ☆18Nov 11, 2019Updated 6 years ago
• bluecmd / wb-axi

  View on GitHub
  Wishbone <-> AXI converters
  ☆13Jun 1, 2015Updated 10 years ago
• hanw / sonic-lite

  View on GitHub
  P4FPGA is located at github.com/hanw/p4fpga
  ☆13Jan 27, 2017Updated 9 years ago
• GavynDracula / DecafCompiler

  View on GitHub
  A compiler of Decaf(an object-oriented compiler)
  ☆12Sep 26, 2017Updated 8 years ago
• mballance / fwrisc-s

  View on GitHub
  ☆10Nov 8, 2019Updated 6 years ago
• cnrv / floating-point-guide

  View on GitHub
  《关于浮点运算：作为程序员都应该了解什么？》
  ☆27Apr 17, 2018Updated 7 years ago
• gregdavill / litex-hyperram

  View on GitHub
  Standard HyperRAM core for ECP5 written in Litex/Migen
  ☆14Dec 6, 2019Updated 6 years ago
• ZipCPU / s6soc

  View on GitHub
  CMod-S6 SoC
  ☆45Jan 6, 2018Updated 8 years ago
• lowRISC / rocket

  View on GitHub
  ☆33Oct 4, 2017Updated 8 years ago
• iDoka / hdl-secded-producer

  View on GitHub
  MATLAB/Octave generator of Hamming ECC coding. Output format is Verilog HDL.
  ☆12Dec 27, 2022Updated 3 years ago
• PixelsCamp / tshirt-challenge-archive

  View on GitHub
  Past Pixels Camp t-shirt challenges
  ☆13Apr 1, 2019Updated 6 years ago
• CJLove / x16-LodeRunner

  View on GitHub
  LodeRunner port to the Commander X16
  ☆15Apr 10, 2021Updated 4 years ago
• DigilentInc / Linux-Digilent-Dev

  View on GitHub
  Fork of Xilinx's Linux repo that adds support for Digilent boards
  ☆10Feb 14, 2018Updated 8 years ago
• joeferner / kicadcloud.com

  View on GitHub
  Source code for kicadcloud.com
  ☆23Jan 18, 2015Updated 11 years ago
• SeanZarzycki / openSPARC-FPU

  View on GitHub
  ASIC Design of the openSPARC Floating Point Unit
  ☆15Mar 13, 2017Updated 9 years ago
• parallella / parallella-riscv

  View on GitHub
  RISC-V port to Parallella Board
  ☆13Aug 22, 2016Updated 9 years ago
• Digilent / Nexys-4-DDR-Keyboard

  View on GitHub
  ☆16Jan 29, 2021Updated 5 years ago
• jfrey-xx / OpenBCI_Python

  View on GitHub
  The Python software library designed to work with OpenBCI hardware.
  ☆11Jun 8, 2017Updated 8 years ago
• rajesh-s / axi_cheatsheet

  View on GitHub
  A quick reference/ cheatsheet for the ARM AMBA Advanced eXtensible Interface (AXI)
  ☆31Oct 28, 2018Updated 7 years ago
• RISCV-on-Microsemi-FPGA / MPF300T-PolarFire-Eval-Kit

  View on GitHub
  PolarFire FPGA sample RISC-V designs
  ☆14Oct 15, 2019Updated 6 years ago
• tudortimi / vpi

  View on GitHub
  SystemVerilog wrapper over the Verilog Programming Interface (VPI)
  ☆13Jun 3, 2025Updated 9 months ago
• Flyfoxs / ty_m

  View on GitHub
  TinyMind人民币面值&冠字号编码识别挑战赛(满分)
  ☆15Jun 2, 2019Updated 6 years ago
• www-asics-ws / wb_conmax

  View on GitHub
  WISHBONE Interconnect
  ☆11Oct 1, 2017Updated 8 years ago
• wsong83 / Asynchronous-Verilog-Synthesiser

  View on GitHub
  Synthesiser for Asynchronous Verilog Language
  ☆20Oct 29, 2014Updated 11 years ago
• wisp / rfid-verilog

  View on GitHub
  RFID tag and tester in Verilog
  ☆42Apr 4, 2013Updated 12 years ago
• tbreuss / asciitron

  View on GitHub
  AsciiDoc Editor built with Electron and Asciidoctor.js.
  ☆11Feb 3, 2023Updated 3 years ago
• redpanda3 / chisel-book

  View on GitHub
  Hardware design with Chisel
  ☆35Feb 9, 2023Updated 3 years ago
• www-asics-ws / usb2_dev

  View on GitHub
  USB 2.0 Device IP Core
  ☆74Oct 1, 2017Updated 8 years ago
• freechipsproject / chisel-coverage

  View on GitHub
  A coverage library for Chisel designs
  ☆11Mar 12, 2020Updated 6 years ago
• antmicro / usb-test-suite-cocotb-usb

  View on GitHub
  ☆10Apr 8, 2021Updated 4 years ago
• filipamator / vu_meter

  View on GitHub
  FPGA-based FFT audio spectrum analyzer
  ☆23Nov 19, 2017Updated 8 years ago
• riscvarchive / riscv-zfinx

  View on GitHub
  ☆12Feb 15, 2024Updated 2 years ago
• SJTU-IPADS / Wukong-S

  View on GitHub
  A distributed stream querying engine that provides sub-millisecond stateful query at millions of queries per-second over fast-evolving li…
  ☆10Jul 18, 2018Updated 7 years ago
• moleike / slos

  View on GitHub
  ☆14Jul 12, 2013Updated 12 years ago
• trivialmips / linux-nontrivial-mips

  View on GitHub
  Linux porting to NonTrivialMIPS (based on linux-stable)
  ☆12Aug 17, 2019Updated 6 years ago
• endvroy / antlr4_bash

  View on GitHub
  Bash lexer and grammar in ANTLR4
  ☆13Jun 14, 2021Updated 4 years ago
• Chlorophytus / broccoli

  View on GitHub
  A soft multimedia/graphics processor prototype in Chisel 3
  ☆11May 3, 2023Updated 2 years ago