Fractional interpolation using a Farrow structure
☆10Oct 11, 2023Updated 3 years ago
Alternatives and similar repositories for VerilogFarrowFilter
Users that are interested in VerilogFarrowFilter are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Simple model of BPSK, QPSK & 8QAM Modulator and Demodulator in MATLAB.☆20Jul 30, 2018Updated 8 years ago
- Implementation of BPSK QPSK ASK and FSK☆16Aug 7, 2020Updated 6 years ago
- Verilog design for hardware ray-caster game☆11Aug 14, 2023Updated 3 years ago
- 用Verilog语言编写,实现2FSK,2PSK, 2DPSK, QPSK调制解调☆44Mar 15, 2019Updated 7 years ago
- This is a project to investigate schemes in OFDM systems such as channel estimation, symbol detection, channel equalization, etc..☆12Apr 24, 2020Updated 6 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- 哈工大软件无线电课设:多相滤波器的原理、实现及其应用,从采样率变换、多相滤波器结构到信道化收发机应用都有matlab介绍和FPGA仿真结果,含答辩PPT、学习笔记和个人总结。☆98Apr 19, 2017Updated 9 years ago
- Compared with the LMS adaptive filter, a variable step size LMS adaptive filter applied on a time delay estimation system is presented in…☆14Oct 3, 2017Updated 9 years ago
- A high-throughput, parameterized, parallel crc hardware implementation.☆12Jun 2, 2024Updated 2 years ago
- AXI4-Lite UART IP core☆14May 29, 2023Updated 3 years ago
- A project demonstrate how to config ad9361 to TX mode☆13Dec 9, 2018Updated 7 years ago
- 宽带波束形成,鄢社峰优化波束书本复现代码(第九章)☆27May 20, 2023Updated 3 years ago
- Hardware implementation (Verilog) and Software Implementation (MATLAB) of IEEE's 802.11a standard for transmitter and receiver sides of W…☆14Feb 19, 2022Updated 4 years ago
- ☆13May 15, 2015Updated 11 years ago
- The examples showcase two ways of using deep learning for classifying time-series data, i.e. ECG data. The first way is using continuous …☆19Nov 23, 2020Updated 5 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- This project implements a Hamming encoder and decoder using Verilog to correct single-bit errors in data transmission. It includes Verilo…☆11Aug 2, 2024Updated 2 years ago
- Clock Data Recovery | 時鐘數據恢復☆12Aug 9, 2020Updated 6 years ago
- Turbo coder and decoder☆12Oct 11, 2023Updated 3 years ago
- 从上位机采用UART或以太网将位流文件烧写到片外Flash中,利用Xilinx FPGA的Multiboot特性,进行OTA(over the air)在线升级。如升级失败,可以回到原来的位流文件。☆13Dec 7, 2023Updated 2 years ago
- NoC based MPSoC☆11Jul 17, 2014Updated 12 years ago
- OFDM baseband processing systerm based on IEEE 802.11a☆13Aug 3, 2020Updated 6 years ago
- The hardware implementation of UDP in Bluespec SystemVerilog☆14Jun 3, 2024Updated 2 years ago
- Digital signal processing library☆20Oct 13, 2020Updated 6 years ago
- SpinalHDL components for Corundum Ethernet☆15Aug 16, 2023Updated 3 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- A lightweight Ethernet MAC Controller IP for FPGA prototyping☆14Oct 19, 2020Updated 6 years ago
- simulation of an Adaptive Beamforming Radar using MATLAB which employs Machine Learning Algorithms and proves that the Least Mean Squared…☆19Apr 17, 2024Updated 2 years ago
- ☆14Nov 28, 2022Updated 3 years ago
- ☆13Jul 29, 2016Updated 10 years ago
- A Scalable BFS Accelerator on FPGA-HBM Platform☆13Jul 30, 2021Updated 5 years ago
- RFNoC out-of-tree module for a channelizer☆17Mar 14, 2018Updated 8 years ago
- FIR and LMS filter implementations in FPGAs☆15Nov 18, 2019Updated 6 years ago
- Synchronous Slave FIFO Interface between Xilinx Spartan 3E and Cypress FX3☆16Mar 11, 2015Updated 11 years ago
- HDL components to build a customized Wishbone crossbar switch☆15May 30, 2019Updated 7 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- 通过SPI协议实现FPGA multiboot在线升级功能☆13May 17, 2018Updated 8 years ago
- The hardware implementation of Poseidon hash function in SpinalHDL☆21Jun 5, 2022Updated 4 years ago
- BCH error-correcting code MATLAB simulator - University of Michigan (Winter, 2011)☆13Nov 14, 2019Updated 6 years ago
- This project is basically ultrasound Beamformer prototype and FPGA is used to control all the modules of the Hardware.☆16Nov 9, 2017Updated 8 years ago
- Partial Verilog implimentation of a WiMAX OFDM Phy☆19May 28, 2012Updated 14 years ago
- Example applications for UHD/RFNoC☆20Mar 8, 2022Updated 4 years ago
- AWGN signal generator IP for FPGA implemented by Verilog HDL with Fmax up to 320MHz on Xilinx Virtex Ultra-Scale FPGA.☆16Sep 20, 2020Updated 6 years ago