HDL implementation of a pipelined multilayer perceptron (neural network)
☆17Sep 14, 2015Updated 10 years ago
Alternatives and similar repositories for Verilog-Multilayer-Perceptron
Users that are interested in Verilog-Multilayer-Perceptron are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Verilog Sigmoid and Tanh functions which can be configured and added to your neural network project☆17Mar 9, 2020Updated 6 years ago
- A final semester based group project for EE4218: Embedded Hardware System Design module in NUS where I worked with my teammate to perform…☆20May 4, 2023Updated 3 years ago
- Verilog library for implementing neural networks.☆27Aug 19, 2014Updated 11 years ago
- A Verilog implementation of a hand-written digit recognition Neural Network☆11Nov 16, 2024Updated last year
- ESP32-NOW with Wifi☆23Apr 11, 2025Updated last year
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- Implementation of ECC on FPGA-Zynq7000 SoC☆19Jul 12, 2019Updated 6 years ago
- ☆12May 31, 2016Updated 9 years ago
- Hardware Description Language Translator☆17Updated this week
- Language for simplifying parameterized RTL design☆14Apr 3, 2026Updated last month
- A repository of my Xilinx Open Hardware 2020 submission including a demo of support vector machines on PYNQ, C++ source code and projects…☆16Jun 27, 2020Updated 5 years ago
- Instruction and files for porting Arm DesignStart to CW305.☆17Dec 6, 2023Updated 2 years ago
- A custom coprocessor and SoC for hardware security experiments in electronics.☆12May 20, 2017Updated 8 years ago
- Software to look for interrelationships between constants and find formulas for number sequences☆19Mar 5, 2026Updated 2 months ago
- A Python module to interact with an Intel JTAG UART☆18May 8, 2021Updated 5 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- DMA Hardware Description with Verilog☆19Dec 20, 2019Updated 6 years ago
- Hardware-backed biometric authentication for Flutter. Create cryptographic signatures using device biometrics with keys stored in Secure …☆16Apr 17, 2026Updated 3 weeks ago
- Present Crypto Engine in Verilog☆12Feb 27, 2016Updated 10 years ago
- A simple and naive WPF appliation that launches SSH daemon inside WSL☆11Jun 5, 2019Updated 6 years ago
- Embedded facial recognition system involving PYNQ board, Webcam, and HDMI output.☆11May 10, 2018Updated 7 years ago
- Tiny MATLAB-to-C converter (TMC Compiler)☆13Oct 26, 2020Updated 5 years ago
- Programmatically control ROS Bag files.☆13Sep 5, 2017Updated 8 years ago
- An automated HDC platform☆11Mar 16, 2026Updated last month
- a fast multiplier implement using verilog☆13Dec 23, 2014Updated 11 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Convert AEDAT4 files from DV into AEDAT-2.0 files for jAER☆10Feb 23, 2024Updated 2 years ago
- ☆11May 10, 2019Updated 6 years ago
- An implementation of the decoding of BCH codes resistant to timing attacks☆11Sep 18, 2020Updated 5 years ago
- Altera JTAG UART wrapper for Bluespec☆25Mar 27, 2014Updated 12 years ago
- Driver for Microchip Technology Inc. 23LC (23LCV) SPI SRAM chips for AVR, SAM3X (Due), and SAM M0+ (SAMD, SAML, SAMC) microcontrollers on…☆14Nov 26, 2019Updated 6 years ago
- Implementation of some classical edge detection algorithms; Roberts, Prewitt, Sobel, Haralick and Marr-Hildreth.☆16May 7, 2014Updated 12 years ago
- Cryptonight Monero Verilog code for ASIC☆20Mar 29, 2018Updated 8 years ago
- Some simple examples for the Magic VLSI physical chip layout tool.☆31Mar 9, 2021Updated 5 years ago
- Error Correction Codes - C☆11May 26, 2019Updated 6 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- A small Deep Learning Image recognition tutorial aimed at people just starting out in their Deep Learning Journey☆12Nov 17, 2018Updated 7 years ago
- Implementation of a Systolic Array based sorting engine on an FPGA using Verilog☆11May 11, 2017Updated 8 years ago
- ☆13May 28, 2021Updated 4 years ago
- Gowin USB3.0 Device Controller IP☆16Aug 20, 2024Updated last year
- This is a simple project that shows how to multiply two 3x3 matrixes in Verilog.☆56Aug 12, 2017Updated 8 years ago
- vhd2vl is designed to translate synthesizable VHDL into Verilog 2001.☆26Jan 7, 2016Updated 10 years ago
- This repo contains the PUF and authentication codes for IoT authentication protocol development project☆12Apr 11, 2020Updated 6 years ago