This is a simple project that shows how to multiply two 3x3 matrixes in Verilog.
☆56Aug 12, 2017Updated 8 years ago
Alternatives and similar repositories for Verilog_Calculator_Matrix_Multiplication
Users that are interested in Verilog_Calculator_Matrix_Multiplication are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Verilog Sigmoid and Tanh functions which can be configured and added to your neural network project☆16Mar 9, 2020Updated 6 years ago
- ☆13Jul 2, 2016Updated 9 years ago
- Project Trellis database☆14Sep 15, 2025Updated 7 months ago
- A project on hardware design for convolutional neural network. This neural network is of 2 layers with 400 inputs in the first layer. Thi…☆18Mar 5, 2018Updated 8 years ago
- mirror of https://git.elphel.com/Elphel/x393_sata☆35May 12, 2020Updated 5 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- This is a hardware implementation of exact multiply accumulator for 32-bit posit number with es=2☆17Jan 27, 2018Updated 8 years ago
- Cryptonight Monero Verilog code for ASIC☆20Mar 29, 2018Updated 8 years ago
- Implementing Different Adder Structures in Verilog☆75Sep 3, 2019Updated 6 years ago
- HDL implementation of a pipelined multilayer perceptron (neural network)☆17Sep 14, 2015Updated 10 years ago
- Python script for controlling the debug-jtag port of riscv cores☆15Mar 27, 2021Updated 5 years ago
- FPGA implement of 8x8 weight stationary systolic array DNN accelerator☆17Feb 27, 2021Updated 5 years ago
- Implementation of SHA256 Hasher with UART Transceiver in Verilog. Designed to run on Altera's DE2 FPGA Development Board.☆16Oct 16, 2018Updated 7 years ago
- AIChip 2021 project, NCKU☆18May 6, 2021Updated 4 years ago
- 3×3脉动阵列乘法器☆51Sep 18, 2019Updated 6 years ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- mechatronics firmware☆14Apr 14, 2025Updated last year
- This is this VLSI designing Project. This Project is created in Cadence Virtuoso. See the PDF for Pre-Post layout results and other detai…☆38Mar 22, 2019Updated 7 years ago
- Implementation of weight stationary systolic array which has a size of 4x4(scalable) to 256X256☆29Feb 21, 2024Updated 2 years ago
- ☆10Aug 30, 2024Updated last year
- AXI4-Stream FIR filter IP☆19Nov 4, 2022Updated 3 years ago
- A Voila-Jones face detector hardware implementation☆33Nov 29, 2018Updated 7 years ago
- mechatronics software☆13Jan 14, 2026Updated 3 months ago
- A Fix-pointed Rudimentary CNN Convolution Accelerator☆16Oct 7, 2020Updated 5 years ago
- course design☆23Feb 28, 2018Updated 8 years ago
- Deploy open-source AI quickly and easily - Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- ☆21Mar 5, 2023Updated 3 years ago
- 数字图像处理彩色图像复原☆16Jun 21, 2021Updated 4 years ago
- ☆73Dec 12, 2018Updated 7 years ago
- tpu-systolic-array-weight-stationary☆25May 7, 2021Updated 4 years ago
- 🤖 An automated NTU Thesis LaTeX continuous integration and continuous deploying service built up with GitHub Actions.☆10May 8, 2020Updated 5 years ago
- Source code for 'Beginning Arduino' by Michael McRoberts☆10Mar 28, 2017Updated 9 years ago
- DMA Project using Verilog HDL☆14Dec 26, 2019Updated 6 years ago
- A Reconfigurable Accelerator for Deep Convolutional Neural Networks Implemented by Chisel3.☆29Jul 14, 2021Updated 4 years ago
- LMS-Adaptive Filter implement using verilog and Matlab☆48Oct 21, 2016Updated 9 years ago
- Wordpress hosting with auto-scaling - Free Trial • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Deep learning accelerator for convolutional layer (convolution operation) and fully-connected layer(matrix-multiplication).☆20Nov 18, 2018Updated 7 years ago
- Provides a packaged collection of open source EDA tools☆12Apr 14, 2019Updated 7 years ago
- Convolution Neural Network of vgg19 model in verilog☆50Jan 4, 2018Updated 8 years ago
- An 8-bit multiplier is synthesized and simulated in Xilinx ISE using Verilog HDL. The multiplication is performed using Vedic Mathematics…☆10Jul 27, 2020Updated 5 years ago
- IC implementation of Systolic Array for TPU☆347Oct 21, 2024Updated last year
- 一个基于AXI接口的PL端卷积加速器,可由PS端调用☆12Apr 15, 2023Updated 3 years ago
- Wameedh Scientific Club Deep Learning for Computer Vision workshop repository.☆12Apr 2, 2024Updated 2 years ago