Alternatives and similar repositories for complex_multiplier:

Users that are interested in complex_multiplier are comparing it to the libraries listed below

• catkira / CIC
  HDL code for a complex multiplier with AXI stream interface
  ☆16Updated 2 years ago
• catkira / DDS
  HDL code for a DDS (direct digital synthesizer) with AXI stream interface
  ☆18Updated 2 years ago
• strath-sdr / rfsoc_frequency_planner
  An RFSoC Frequency Planner developed using Python.
  ☆26Updated last year
• strath-sdr / rfsoc_ofdm
  PYNQ example of an OFDM Transmitter and Receiver on RFSoC.
  ☆48Updated last year
• strath-sdr / rfsoc_qsfp_offload
  RFSoC QSFP Data Offload Design with GNU Radio
  ☆18Updated 5 months ago
• BBN-Q / VHDL-JESD204b
  JESD204b modules in VHDL
  ☆30Updated 6 years ago
• oscimp / oscimpDigital
  OscillatorIMP ecosystem for the digital characterization of ultrastable oscillators and Software Defined Radio (SDR) frontend processing
  ☆54Updated last month
• MicroPhase / antsdr_standalone
  Standalone application based on ADI hdl and no_OS for ANTSDR.
  ☆21Updated last month
• Xilinx / RFSoC2x2-PYNQ
  RFSoC2x2 board repo for PYNQ
  ☆17Updated 2 years ago
• analogdevicesinc / ad937x-filter-wizard
  MATLAB-based FIR filter and profile designer
  ☆10Updated 8 years ago
• Teddy-van-Jerry / sdr-psk-fpga
  Dual-Mode PSK Transceiver on SDR With FPGA
  ☆30Updated 6 months ago
• suoto / fpga_cores
  ☆33Updated 2 years ago
• strath-sdr / rfsoc_studio
  The Strathclyde RFSoC Studio Installer for PYNQ.
  ☆31Updated 2 years ago
• strath-sdr / rfsoc_qpsk
  PYNQ example of using the RFSoC as a QPSK transceiver.
  ☆100Updated last year
• strath-sdr / rfsoc_notebooks
  A collection of RFSoC introductory notebooks for PYNQ.
  ☆21Updated 3 years ago
• dshekhalev / FEC
  FEC Codec IP core library for a some famous codes (BCH, RS, LDPC, Turbo)
  ☆99Updated 10 months ago
• MicroPhase / antsdr-pynq
  pynq framework for antsdr
  ☆34Updated 11 months ago
• analogdevicesinc / TransceiverToolbox
  MATLAB toolbox for ADI transceiver products
  ☆62Updated last month
• strath-sdr / pynq_agc
  Demonstration of Automatic Gain Control with PYNQ
  ☆13Updated 2 years ago
• paulscherrerinstitute / psi_common
  Common elements for FPGA Design (FIFOs, RAMs, etc.)
  ☆33Updated 2 months ago
• efard / DSPHDL
  ☆41Updated last year
• strath-sdr / rfsoc_radio
  PYNQ example of using the RFSoC as a QPSK/BPSK radio transceiver.
  ☆36Updated last year
• fcayci / vhdl-axis-uart
  UART to AXI Stream interface written in VHDL
  ☆16Updated 2 years ago
• fpga-soc / mil-std-1553b-soc
  development interface mil-std-1553b for system on chip
  ☆21Updated 7 years ago
• LukiLeu / FPGA_ADC
  An FPGA-based 7-ENOB 600 MSample/s ADC without any External Components
  ☆45Updated 3 years ago
• Grootzz / AD9361_TX_MSK
  A project demonstrate how to config ad9361 to TX mode and how to transmit MSK
  ☆57Updated 5 years ago
• hukenovs / intfftk
  Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source la…
  ☆85Updated 2 years ago
• daveshah1 / RFToolSDR
  AD9361 based USB3 SDR
  ☆111Updated 7 years ago
• BerkeleyLab / Bedrock
  LBNL RF controls support HDL libraries. Mirroring LBNL's internal Gitlab repository, which is CI enabled
  ☆57Updated this week
• coralhu123 / KC705-AD9371
  The implementation of AD9371 on KC705
  ☆20Updated 5 years ago