This linter plugin for SublimeLinter provides an interface to iverilog (verilog compiler).
☆13Apr 16, 2024Updated 2 years ago
Alternatives and similar repositories for SublimeLinter-contrib-iverilog
Users that are interested in SublimeLinter-contrib-iverilog are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- The VD100 development board is based on the Xilinx Versal AI Edge series chip xcve2302 and is designed with a core board and a bottom boa…☆19Jul 9, 2024Updated last year
- 👌 This linter plugin for SublimeLinter provides an interface to Verilator (Verilog Simulator)☆16May 14, 2026Updated 3 weeks ago
- 🔧 Verilog plugin for Sublime Text 2/3. It helps to generate a simple testbench, instantiate a module, insert a user-header, repeat codes…☆45Mar 27, 2026Updated 2 months ago
- Verilog Package for Sublime Text 2/3☆23Jan 27, 2024Updated 2 years ago
- GUI for SymbiYosys☆17Oct 13, 2025Updated 7 months ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- lightweight open HLS for FPGA rapid prototyping☆20Mar 22, 2018Updated 8 years ago
- Xilinx IP repository☆13May 5, 2018Updated 8 years ago
- Next-Generation FPGA Place-and-Route☆10Aug 1, 2018Updated 7 years ago
- Testing tools (binary/text) for RS232, QTcpSocket, QLocalSocket☆13Dec 22, 2015Updated 10 years ago
- C# projects that use ANTLR4 library to analyse VHDL and Verilog code☆11Feb 28, 2015Updated 11 years ago
- Used for hardware trojan detection(Based on Trust_Hub)☆10Jul 30, 2019Updated 6 years ago
- A cross platform, formally verified, open source, hyperRAM controller with simulator☆15Feb 22, 2019Updated 7 years ago
- 视频旋转(2019FPGA大赛)☆41May 5, 2020Updated 6 years ago
- A FIFO or Queue is an array of memory commonly used in hardware to transfer transfer data between two circuits with different clocks. The…☆16Nov 5, 2017Updated 8 years ago
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- Translation of the `Managing projects with GNU make' book to Russian.☆12May 26, 2013Updated 13 years ago
- A vhdl package for reading and writing bitmap files.☆12Jan 9, 2018Updated 8 years ago
- Modular SRAM-based indirectly-indexed 2D hierarchical-search Binary Content Addressable Memory (II-2D-BCAM)☆17Nov 10, 2024Updated last year
- Building FPGAs with Quartus+CMake☆18Aug 14, 2017Updated 8 years ago
- High Frame Rate Camera Project compatible with a MicroZed 7020 SoC + FMC Carrier Board☆18Apr 17, 2020Updated 6 years ago
- Adds Switch's UI sounds to your keyboard presses.☆11Jun 23, 2022Updated 3 years ago
- Verilog Code and Logisim simulation of a Weighted Round Robit Arbiter circuit using digital components☆20Mar 10, 2018Updated 8 years ago
- A bearlibterminal wrapper☆17Nov 1, 2020Updated 5 years ago
- A collection of SPI related cores☆21Nov 12, 2024Updated last year
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- a pelican plugin developed to auto space CJK characters☆14Jan 22, 2019Updated 7 years ago
- Modular SRAM-based 2D hierarchical-search Binary Content Addressable Memory (2D-BCAM)☆22Nov 10, 2024Updated last year
- Sublime Text 非官方中文语言包☆11Dec 15, 2025Updated 5 months ago
- Universal Hardware Data Model. A complete modeling of the IEEE SystemVerilog Object Model with VPI Interface, Elaborator, Serialization, …☆18May 31, 2026Updated last week
- A Sublime Text plugin that displays inline images for single-line comments formatted like `// `.☆12May 16, 2024Updated 2 years ago
- Modular SRAM-based indirectly-indexed 2D hierarchical-search Ternary Content Addressable Memory (II-2D-TCAM)☆23Nov 10, 2024Updated last year
- Synchronous FIFOs designed in Verilog/System Verilog.☆25Dec 21, 2025Updated 5 months ago
- This is a cool UWP DeveloperTool that includes Brushes, Styles, Controls, ColorPicker, open source projects made with Win2d☆15Jun 23, 2021Updated 4 years ago
- Contains source code for sin/cos table verification using UVM☆23Mar 9, 2021Updated 5 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- At present, just an example to show how to map the detection algorithm YOLOv2 from model to FPGA☆31Jan 9, 2019Updated 7 years ago
- ☆80Feb 5, 2022Updated 4 years ago
- 常用Verilog模块☆20Mar 3, 2020Updated 6 years ago
- 云编译RAX3000M-eMMC闭源固件并整理保存其他大佬的798x\762x\固件☆24Jun 12, 2025Updated 11 months ago
- Testing FPGA2SDRAM interface on Altera Cyclone V SoC☆14May 12, 2015Updated 11 years ago
- Generate UVM testbench framework template files with Python 3☆26Dec 23, 2019Updated 6 years ago
- ☆23Jan 10, 2023Updated 3 years ago