corundum / verilog-ethernet
Verilog Ethernet components for FPGA implementation
☆14Updated last year
Related projects ⓘ
Alternatives and complementary repositories for verilog-ethernet
- Verilog PCI express components☆18Updated last year
- Open source FPGA-based NIC and platform for in-network compute☆58Updated 2 weeks ago
- ☆16Updated 2 years ago
- Implementation of the PCIe physical layer☆30Updated last week
- ☆47Updated 2 years ago
- Ethernet switch implementation written in Verilog☆40Updated last year
- PCI Express controller model☆45Updated 2 years ago
- Ethernet MAC 10/100 Mbps☆79Updated 5 years ago
- Pcie to AXI Bridge in Xilinx series-7 Kintex and Artix devices☆29Updated 8 years ago
- VM-HDL Co-Simulation for Servers with PCIe-Connected FPGAs☆41Updated 3 years ago
- Generic FIFO implementation with optional FWFT☆54Updated 4 years ago
- Hamming ECC Encoder and Decoder to protect memories☆28Updated last month
- JTAG DPI module for SystemVerilog RTL simulations☆26Updated 9 years ago
- LowRISC port to Zedboard☆12Updated 7 years ago
- RISCV core RV32I/E.4 threads in a ring architecture☆30Updated last year
- Ethernet 10GE MAC☆44Updated 10 years ago
- Groundhog - Serial ATA Host Bus Adapter☆21Updated 6 years ago
- A simple DDR3 memory controller☆51Updated last year
- ☆47Updated 3 years ago
- USB -> AXI Debug Bridge☆35Updated 3 years ago
- Extensible FPGA control platform☆54Updated last year
- Register-based and RAM-based FIFOs designed in Verilog/System Verilog.☆14Updated 3 months ago
- ☆12Updated 3 years ago
- ☆23Updated 3 years ago
- A lightweight core for the CV32E40 implementing the RISC-V vector extension specification. (v0.8)☆30Updated 3 years ago
- Open-source high performance AXI4-based HyperRAM memory controller☆58Updated 2 years ago
- Verilog Ethernet Switch (layer 2)☆35Updated last year
- ☆24Updated 4 years ago
- ☆34Updated 9 months ago
- ☆21Updated 2 months ago