Alternatives and similar repositories for ac_types

Users that are interested in ac_types are comparing it to the libraries listed below

• dillonhuff / ahaHLS
  An open source high level synthesis (HLS) tool built on top of LLVM
  ☆127Updated last year
• cpc / openasip
  Open Application-Specific Instruction Set processor tools (OpenASIP)
  ☆171Updated 3 weeks ago
• NVlabs / matchlib
  SystemC/C++ library of commonly-used hardware functions and components for HLS.
  ☆291Updated 2 months ago
• manish-kj / PACoGen
  PACoGen: Posit Arithmetic Core Generator
  ☆76Updated 6 years ago
• bespoke-silicon-group / bsg_manycore
  Tile based architecture designed for computing efficiency, scalability and generality
  ☆276Updated last week
• hlslibs / ac_math
  Algorithmic C Math Library
  ☆67Updated last week
• masc-ucsc / livehd
  Live Hardware Development (LiveHD), a productive infrastructure for Synthesis and Simulation
  ☆231Updated this week
• ucsc-vama / essent
  high-performance RTL simulator
  ☆185Updated last year
• anikau31 / systemc-clang
  This is a Clang tool that parses SystemC models, and synthesizes Verilog from it.
  ☆88Updated last year
• NVlabs / GEM
  Open-source RTL logic simulator with CUDA acceleration
  ☆252Updated 3 months ago
• chipsalliance / aib-phy-hardware
  Advanced Interface Bus (AIB) die-to-die hardware open source
  ☆145Updated last year
• esa-tu-darmstadt / tapasco
  The Task Parallel System Composer (TaPaSCo)
  ☆116Updated last month
• bluespec / Toooba
  RISC-V Core; superscalar, out-of-order, multi-core capable; based on RISCY-OOO from MIT
  ☆181Updated 8 months ago
• phanrahan / magma
  magma circuits
  ☆264Updated last year
• Xilinx / HLS
  Vitis HLS LLVM source code and examples
  ☆403Updated 3 months ago
• t-crest / patmos
  Patmos is a time-predictable VLIW processor, and the processor for the T-CREST project
  ☆152Updated last week
• StanfordAHA / garnet
  Next generation CGRA generator
  ☆118Updated last week
• intel / systemc-compiler
  This tool translates synthesizable SystemC code to synthesizable SystemVerilog.
  ☆300Updated last week
• chipsalliance / fpga-tool-perf
  FPGA tool performance profiling
  ☆104Updated last year
• PrincetonUniversity / prga
  Open-source FPGA research and prototyping framework.
  ☆210Updated last year
• hlslibs / matchlib_connections
  Matchlib Connections Library - latency insensitive channels (from NVlabs/matchlib/connections)
  ☆43Updated last week
• pulp-platform / hero
  Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…
  ☆114Updated 2 years ago
• rdaly525 / coreir
  ☆104Updated 3 years ago
• ferrandi / PandA-bambu
  PandA-bambu public repository
  ☆305Updated last week
• chipsalliance / firrtl-spec
  The specification for the FIRRTL language
  ☆62Updated last week
• Minres / SystemC-Components
  A SystemC productivity library: https://minres.github.io/SystemC-Components/
  ☆127Updated last week
• openhwgroup / core-v-xif
  RISC-V eXtension interface that provides a generalized framework suitable to implement custom coprocessors and ISA extensions
  ☆79Updated last year
• scale-lab / la-core
  Linear algebra accelerators for RISC-V (published in ICCD 17)
  ☆67Updated 8 years ago
• x-heep / x-heep
  eXtendable Heterogeneous Energy-Efficient Platform based on RISC-V
  ☆233Updated this week
• UCLA-VAST / RapidStream
  [FPGA 2022, Best Paper Award] Parallel placement and routing of Vivado HLS dataflow designs.
  ☆128Updated 3 years ago