This XUP course provides an introduction to embedded system design on Zynq using the Xilinx Vivado software suite.
☆88Jun 29, 2023Updated 2 years ago
Alternatives and similar repositories for Zynq-Design-using-Vivado
Users that are interested in Zynq-Design-using-Vivado are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆12Apr 7, 2020Updated 6 years ago
- AMD Xilinx University Program Embedded tutorial☆51Feb 18, 2023Updated 3 years ago
- Tutorial on how to use the AXI ACP on the UltraZed-EG IOCC☆11Jun 13, 2018Updated 8 years ago
- ☆16Aug 6, 2022Updated 3 years ago
- ☆14Mar 13, 2023Updated 3 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- This is a wiki and code sharing for ZYNQ☆74Apr 2, 2016Updated 10 years ago
- ☆62Sep 22, 2022Updated 3 years ago
- Template PCB's for SYZYGY board designs☆29Aug 15, 2022Updated 3 years ago
- Accelerating DNN inference and training on Zynq☆16Jul 22, 2020Updated 5 years ago
- ☆19Jul 19, 2018Updated 7 years ago
- ☆29Nov 21, 2018Updated 7 years ago
- The PicoBlaze-Library offers several PicoBlaze devices and code routines to extend a common PicoBlaze environment to a little System on a…☆37Dec 24, 2020Updated 5 years ago
- ☆14Jul 12, 2023Updated 2 years ago
- Huffman encoding core (Vivado HLS Project)☆12Oct 15, 2019Updated 6 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- CDL Hardware implementations; BBC microcomputer, RISC-V (numerous), frame buffers, JTAG, etc☆17Feb 20, 2020Updated 6 years ago
- VHDL codes to generate GPS L1 C/A and Galileo E1OS and E5 PRNs and dataless signals. Secondary codes not included.☆33Feb 22, 2019Updated 7 years ago
- This course gives an introduction to digital design tool flow in Xilinx programmable devices using Vivado® Design software suite☆42Oct 15, 2019Updated 6 years ago
- Spiking neural network for Zynq devices with Vivado HLS☆38Feb 21, 2018Updated 8 years ago
- UART to AXI Stream interface written in VHDL☆19Oct 20, 2022Updated 3 years ago
- Xilinx Virtual Cable Daemon☆20Nov 20, 2019Updated 6 years ago
- Updated version of the XUP Workshops☆18Aug 10, 2018Updated 7 years ago
- Open Hardware carrier board supporting modules with Zynq 7000 All Programmable SoC devices.☆70Aug 7, 2023Updated 2 years ago
- Open-Source Framework for Co-Emulation☆13Feb 12, 2021Updated 5 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- A guide on how to package HDL code (VHDL or Verilog) for PYNQ environments☆11Aug 14, 2025Updated 10 months ago
- STM32f4 Discovery Board☆10Nov 17, 2017Updated 8 years ago
- A configuration controller solution allowing a Zynq device to configure downstream FPGAs☆14Oct 5, 2015Updated 10 years ago
- Common elements for FPGA Design (FIFOs, RAMs, etc.)☆41Feb 24, 2025Updated last year
- Updated Xilinx PYNQ for Zynq + ZynqMP python HW acceleration development☆12Mar 16, 2018Updated 8 years ago
- DMA enabled Zynq PS-PL communication to implement high throughput data transfer between Linux applications and user IP core.☆41Feb 8, 2017Updated 9 years ago
- Python Productivity for ZYNQ☆2,311Mar 2, 2026Updated 3 months ago
- ☆28Mar 29, 2018Updated 8 years ago
- SPI Master and Slave components to be used in all of FPGAs, written in VHDL.☆47Apr 17, 2020Updated 6 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Image pixel classification with random forests☆18Sep 8, 2014Updated 11 years ago
- AMD University Program HLS tutorial☆127Oct 28, 2024Updated last year
- ☆24Dec 3, 2021Updated 4 years ago
- Benchmark framework of compute-in-memory based accelerators for deep neural network (inference engine focused)☆11Jun 1, 2021Updated 5 years ago
- A PYNQ overlay demonstrating Pythonic DSP running on Zynq UltraScale+☆40Jun 29, 2022Updated 3 years ago
- Logarithmic DAC for AY8913 and SN76489 programmable sound generators (Done as part of Zero To ASIC Analog course)☆11Jun 1, 2024Updated 2 years ago
- PyCOMPSs AutoParallel☆12Aug 27, 2020Updated 5 years ago