ptoupas / amd-open-hardware-23
This repository provides an FPGA-based solution for executing object detection, focusing specifically on the popular YOLOv5 model architecture.
☆38Updated last year
Alternatives and similar repositories for amd-open-hardware-23:
Users that are interested in amd-open-hardware-23 are comparing it to the libraries listed below
- Performance and resource models for fpgaConvNet: a Streaming-Architecture-based CNN Accelerator.☆28Updated 2 months ago
- A collection of tutorials for the fpgaConvNet framework.☆37Updated 4 months ago
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆32Updated 5 years ago
- This TRD is implement DPU v1.4.0 on PYNQ-Z2 board☆44Updated 4 years ago
- ☆38Updated last year
- Systolic array based simple TPU for CNN on PYNQ-Z2☆21Updated 2 years ago
- This repository contains all the necessary material to implement a YOLOv3 object detection algorithm on the PYNQ-Z2 FPGA. There is a step…☆38Updated 2 months ago
- ☆60Updated 6 years ago
- An HLS based winograd systolic CNN accelerator☆49Updated 3 years ago
- An FPGA Accelerator for Transformer Inference☆75Updated 2 years ago
- ☆27Updated 2 months ago
- SystemVerilog files for lab project on a DNN hardware accelerator☆13Updated 3 years ago
- This project implements a convolution kernel based on vivado HLS on zcu104☆36Updated 4 years ago
- CNN-Accelerator based on FPGA developed by verilog HDL.☆45Updated 4 years ago
- hardware design of universal NPU(CNN accelerator) for various convolution neural network☆92Updated 3 weeks ago
- Verilog implementation of Softmax function☆54Updated 2 years ago
- ☆17Updated 2 years ago
- A Flexible and Energy Efficient Accelerator For Sparse Convolution Neural Network☆39Updated 4 months ago
- FPGA/AES/LeNet/VGG16☆93Updated 6 years ago
- FPGA based Vision Transformer accelerator (Harvard CS205)☆94Updated last year
- 2020 xilinx summer school☆17Updated 4 years ago
- Hardware accelerator for convolutional neural networks☆33Updated 2 years ago
- ☆26Updated 2 years ago
- A generic Convolutional Neural Network (CNN) Accelerator (CNNA) for FPGA☆22Updated 3 years ago
- IC implementation of TPU☆92Updated 5 years ago
- FPGA and GPU acceleration of LeNet5☆35Updated 5 years ago
- Zynq-7000 DPU TRD☆44Updated 5 years ago
- A FPGA-based neural network inference accelerator, which won the third place in DAC-SDC☆28Updated 2 years ago
- A CNN accelerator design inspired by MIT Eyeriss project☆17Updated 3 years ago
- ☆19Updated 2 years ago