abdelfattah-lab / BRAMACLinks
☆10Updated last year
Alternatives and similar repositories for BRAMAC
Users that are interested in BRAMAC are comparing it to the libraries listed below
Sorting:
- ☆31Updated 8 months ago
- Sparse CNN Accelerator targeting Intel FPGA☆12Updated 4 years ago
- A DAG processor and compiler for a tree-based spatial datapath.☆15Updated 3 years ago
- A Fix-pointed Rudimentary CNN Convolution Accelerator☆16Updated 5 years ago
- CNN-Accelerator based on FPGA developed by verilog HDL.☆11Updated 3 years ago
- CNN Accelerator in Frequency Domain☆12Updated 5 years ago
- ☆25Updated 3 years ago
- Provides the code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerators" by Luk…☆19Updated 6 years ago
- FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations☆95Updated 4 years ago
- PolyLUT is the first quantized neural network training methodology that maps a neuron to a LUT while using multivariate polynomial functi…☆56Updated last year
- A collection of tutorials for the fpgaConvNet framework.☆47Updated last year
- ☆16Updated 2 years ago
- RTL code for the DPU chip designed for irregular graphs☆13Updated 3 years ago
- Arrhythmia Detection Using Algorithm and Hardware Co-design for Neural Network Inference Accelerators☆16Updated 2 years ago
- An HLS based winograd systolic CNN accelerator☆54Updated 4 years ago
- Designs for finalist teams of the DAC System Design Contest☆37Updated 5 years ago
- [TECS'23] A project on the co-design of Accelerators and CNNs.☆21Updated 3 years ago
- Provides the hardware code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerator…☆24Updated 5 years ago
- MaxEVA: Maximizing the Efficiency of Matrix Multiplication on Versal AI Engine (accepted as full paper at FPT'23)☆21Updated last year
- Open-source of MSD framework☆16Updated 2 years ago
- ☆72Updated 2 years ago
- ☆64Updated 5 years ago
- FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks☆49Updated 10 months ago
- A general framework for optimizing DNN dataflow on systolic array☆38Updated 4 years ago
- A Convolutional Neural Network (CNN) hardware accelerator for image recognition☆14Updated 6 years ago
- SAMO: Streaming Architecture Mapping Optimisation☆34Updated 2 years ago
- ☆35Updated 6 years ago
- ☆19Updated 4 years ago
- This repository contains source code for CNN layers of ALexNet using Xilinx HLS Vivado.☆10Updated 3 years ago
- ☆71Updated 5 years ago