A CIC filter implemented in Verilog
☆25Sep 7, 2015Updated 10 years ago
Alternatives and similar repositories for CIC
Users that are interested in CIC are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Useful m-scripts for DSP (CIC, FIR, FFT, Fast convolution, Partial Filters etc.)☆33Aug 14, 2020Updated 5 years ago
- This is a project meant to be run on an FPGA that was Implemented in the Verilog HDL using Xilinx ISE design suite.☆26May 12, 2020Updated 6 years ago
- FIR band-pass filter using Verilog HDL.☆13Sep 6, 2020Updated 5 years ago
- HDMI + GPU-pipeline + FFT☆14Mar 4, 2016Updated 10 years ago
- FIR filter implementation☆29Mar 19, 2020Updated 6 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Verilog HDL implementation of an ECHO machine and an FIR filter that filters out a specific noise. More details provided in individual fi…☆10Aug 25, 2019Updated 6 years ago
- The CORDIC algorithm implemented in Octave/MATLAB and Verilog☆32Mar 31, 2015Updated 11 years ago
- A design of 15-order FIR filter using Verilog, with modulation and demodulation system using MATLAB☆11Aug 15, 2020Updated 5 years ago
- AES☆16Oct 4, 2022Updated 3 years ago
- Implementation of pipelined IIR bandstop filter in Verilog, C++ and MATLAB with fixed point arithmetic☆32May 6, 2017Updated 9 years ago
- Verilog Code for a JPEG Decoder☆34Mar 7, 2018Updated 8 years ago
- Hardware Division Units☆10Jul 17, 2014Updated 12 years ago
- 关于CIC滤波器、ISOP补偿器、HB滤波器的相关Matlab仿真与FPGA工程☆17Dec 25, 2023Updated 2 years ago
- A tiny FP8 multiplication unit written in Verilog. TinyTapeout 2 submission.☆14Nov 23, 2022Updated 3 years ago
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- STM32G474 USB CDC example implementation, combined with Jan Breuer's SCPI parser library v2☆35Jan 4, 2023Updated 3 years ago
- Open source/hardware SoC plattform based on the lattice mico 32 softcore☆15Apr 10, 2010Updated 16 years ago
- FIR，FFT based on Verilog☆14Dec 3, 2017Updated 8 years ago
- FIR implemention with Verilog☆50May 18, 2019Updated 7 years ago
- Linux SPI protocol device driver for Lattice ECP5 FPGA programming through slave SPI interface☆10Apr 10, 2023Updated 3 years ago
- A 2D mesh Network on Chip with 5-stage pipelined router, all implemented in Verilog and run on Artix-7 FPGA.☆21May 30, 2023Updated 3 years ago
- This is the repository for a verilog implementation of a lzrw1 compression core☆19Dec 8, 2017Updated 8 years ago
- Deploying Haskell to Lattice iCE40 using fully open source toolchain☆14May 22, 2016Updated 10 years ago
- This project demonstrates DSP capabilities of Terasic DE2-115☆29Jun 22, 2018Updated 8 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- DSP WishBone Compatible Cores☆14Jul 17, 2014Updated 12 years ago
- ☆28Feb 5, 2020Updated 6 years ago
- Models of the early stages in the primate visual system, including retina, LGN and primary visual cortex (V1)☆15Jun 24, 2018Updated 8 years ago
- Somewhere to put the esp32 code I am playing with.☆14Jan 24, 2016Updated 10 years ago
- A simple and crude CIC filter implementation in Python3 for learning purposes☆22Aug 16, 2019Updated 6 years ago
- A case study of a continuous-time Delta-Sigma modulator including system-level simulations/design of the CT-DSM, circuit-design of the fr…☆15Apr 14, 2026Updated 3 months ago
- LMS-Adaptive Filter implement using verilog and Matlab☆50Oct 21, 2016Updated 9 years ago
- bpm.is sauce☆10Nov 5, 2021Updated 4 years ago
- Digital Systems Course Project: Fake Currency Detection in Verilog using Basys3 FPGA and MATLAB☆10Sep 30, 2020Updated 5 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- official build specifications for jupyter☆13Jun 3, 2021Updated 5 years ago
- ☆21Mar 9, 2021Updated 5 years ago
- HiLoTOF -- Hardware-in-the-Loop Test framework for Open FPGAs☆13Feb 9, 2019Updated 7 years ago
- HDL components to build a customized Wishbone crossbar switch☆15May 30, 2019Updated 7 years ago
- RTL to GDS via Cadence Tools☆19May 17, 2022Updated 4 years ago
- Maven Silicon project - AHB-to-APB Bridge Verification using UVM Methodology.☆115Jul 2, 2023Updated 3 years ago
- ☆14Sep 14, 2017Updated 8 years ago