DVB-S2 LDPC Decoder
☆31Jul 17, 2014Updated 12 years ago
Alternatives and similar repositories for dvb_s2_ldpc_decoder
Users that are interested in dvb_s2_ldpc_decoder are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- - Designed the LDPC decoder in the Matlab using the min-sum approach. - Designed quantized RTL in Verilog with the min-sum approach and …☆54Sep 17, 2017Updated 9 years ago
- A matlab implementation of the 802.11n LDPC encoder and decoder☆66Sep 22, 2021Updated 5 years ago
- C and MATLAB implementation for LDPC encoding and decoding☆240Jan 18, 2026Updated 8 months ago
- Turbo coder and decoder☆12Oct 11, 2023Updated 3 years ago
- MATLAB implementation of the DVB-S2 as in ETSI EN 302 307-1☆15Aug 26, 2021Updated 5 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- A min-sum LDPC decoder written in SystemVerilog (IEEE 1800-2012)☆11Jan 8, 2021Updated 5 years ago
- File editor for the Xilinx AXI Traffic Generator IP☆17Feb 9, 2026Updated 8 months ago
- 5g ldpc codes☆132Aug 28, 2026Updated last month
- AltOr32 - Alternative Lightweight OpenRisc CPU☆13Dec 17, 2015Updated 10 years ago
- This is a CUDA application for LDPC-CC Decoder☆16Sep 28, 2015Updated 11 years ago
- An inserted spectrum analyzer based on Zynq-7000, which uses scheme for FPGA+ARM standalone.☆27Apr 30, 2023Updated 3 years ago
- 通过调试ADRV9009和AD9371对jesd204b知识点作进一步学习和总结☆25Nov 8, 2019Updated 6 years ago
- Light Cube using PYNQ☆10Aug 4, 2018Updated 8 years ago
- An efficient implementation of the Viterbi decoding algorithm in Verilog☆63Mar 15, 2024Updated 2 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- matlab code of ldpc☆15Oct 25, 2016Updated 9 years ago
- 16-APSK DVB-S2 Transmitter for BladeRF☆22Jul 20, 2022Updated 4 years ago
- A project demonstrate how to config ad9361 to TX mode☆13Dec 9, 2018Updated 7 years ago
- verilog☆21Jun 26, 2023Updated 3 years ago
- ☆13May 13, 2021Updated 5 years ago
- FreeRTOS/lwIP (XAPP1026) for Xilinx Zynq devices using Vivado 2016.1. This port is compatible with Xilinx Vivado 2016.1 and was tested on…☆16Mar 28, 2017Updated 9 years ago
- Tools for working with the 802.11B scrambler when writing Packet-in-Packet exploits.☆21Sep 15, 2013Updated 13 years ago
- CUDA implementation of LDPC decoding algorithm☆46Dec 16, 2020Updated 5 years ago
- NVMe Controller featuring Hardware Acceleration☆121Jun 23, 2021Updated 5 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.☆481Jan 29, 2023Updated 3 years ago
- Matlab implementation of polar codes for a BEC☆11Dec 1, 2017Updated 8 years ago
- A fully trainable BP decoder, enabling the discovery of new parity check matrix through automatic learning☆14Sep 26, 2022Updated 4 years ago
- This is my MTech Thesis Dissertation Topic.☆11Oct 21, 2022Updated 3 years ago
- It is SATA 3 host controller. Using this you can read write to sata3 sdd/hdd from your fpga logic with simple memory like interface.☆78Jun 2, 2024Updated 2 years ago
- Yilong's NetFPGA-10G Repo☆13May 7, 2015Updated 11 years ago
- LUT LDPC is a collection of software tools to design and test LDPC decoders based on discrete message passing decoding using lookup table…☆18May 30, 2018Updated 8 years ago
- Full piplined LDPC decoder (IEEE 802.16e) implement in FPGA using Xilinx HLS(C synthesis to Verilog Codes)..☆45May 2, 2019Updated 7 years ago
- RTL implementation of components for DVB-S2☆149May 25, 2026Updated 4 months ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- This repository contains a template AMP project for the Zedboard using VGA, FreeRTOS, LVGL and USB peripherals☆32Oct 12, 2023Updated 2 years ago
- Gaussian noise generator Verilog IP core☆35Jul 5, 2026Updated 3 months ago
- Implementation of fLaC encoder/decoder for FPGA☆31Oct 31, 2018Updated 7 years ago
- mirror of https://git.elphel.com/Elphel/x393_sata☆37May 12, 2020Updated 6 years ago
- 最小和算法实现☆10Jul 12, 2020Updated 6 years ago
- NMS_decode☆14Jul 17, 2020Updated 6 years ago
- Fractional interpolation using a Farrow structure☆10Oct 11, 2023Updated 3 years ago