freecores / dvb_s2_ldpc_decoderLinks
DVB-S2 LDPC Decoder
☆29Updated 11 years ago
Alternatives and similar repositories for dvb_s2_ldpc_decoder
Users that are interested in dvb_s2_ldpc_decoder are comparing it to the libraries listed below
Sorting:
- An efficient implementation of the Viterbi decoding algorithm in Verilog☆59Updated last year
- PYNQ example of an OFDM Transmitter and Receiver on RFSoC.☆58Updated 2 years ago
- Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…☆80Updated 2 years ago
- Low Density Parity Check Decoder☆18Updated 9 years ago
- Gaussian noise generator Verilog IP core☆32Updated 2 years ago
- Verilog实现OFDM基带☆45Updated 9 years ago
- FEC Codec IP core library for a some famous codes (BCH, RS, LDPC, Turbo)☆129Updated 2 weeks ago
- Reed Solomon Encoder and Decoder Digital IP☆21Updated 5 years ago
- Implementation of Partially Parellel LDPC Code Decoder in Verilog☆15Updated 5 years ago
- IEEE 802.11 OFDM-based transceiver system☆41Updated 8 years ago
- - Designed the LDPC decoder in the Matlab using the min-sum approach. - Designed quantized RTL in Verilog with the min-sum approach and …☆54Updated 8 years ago
- A min-sum LDPC decoder written in SystemVerilog (IEEE 1800-2012)☆11Updated 5 years ago
- 通过调试ADRV9009和AD9371对jesd204b知识点作进一步学习和总结☆23Updated 6 years ago
- The implementation of AD9371 on KC705☆20Updated 7 months ago
- This project aims to implement a digital predistortion algorithm for power amplifier linearizion using vhdl. It contains VHDL design for …☆18Updated 3 years ago
- A collection of phase locked loop (PLL) related projects☆115Updated last year
- Hardware Assisted IEEE 1588 IP Core☆30Updated 11 years ago
- PYNQ example of using the RFSoC as a QPSK transceiver.☆109Updated 2 years ago
- LTE/WiFi/5G-NR SDR Transceiver☆56Updated 7 years ago
- A project demonstrate how to config ad9361 to TX mode and how to transmit MSK☆62Updated 6 years ago
- Dual-Mode PSK Transceiver on SDR With FPGA☆50Updated last year
- Hardware Viterbi Decoder in verilog☆28Updated 6 years ago
- Partial Verilog implimentation of a WiMAX OFDM Phy☆19Updated 13 years ago
- RFSoC2x2 board repo for PYNQ☆17Updated 3 years ago
- An RFSoC Frequency Planner developed using Python.☆31Updated 2 years ago
- Verilog based BCH encoder/decoder☆131Updated 3 years ago
- RTL implementation of components for DVB-S2☆130Updated 2 years ago
- Wi-Fi LDPC codec Verilog IP core☆18Updated 6 years ago
- HDL code for a complex multiplier with AXI stream Interface☆13Updated 2 years ago
- Python productivity for RFSoC platforms☆85Updated 2 months ago