yugithub / OFDM-basebandLinks
Verilog实现OFDM基带
☆44Updated 9 years ago
Alternatives and similar repositories for OFDM-baseband
Users that are interested in OFDM-baseband are comparing it to the libraries listed below
Sorting:
- IEEE 802.11 OFDM-based transceiver system☆40Updated 7 years ago
- A project demonstrate how to config ad9361 to TX mode and how to transmit MSK☆60Updated 6 years ago
- Dual-Mode PSK Transceiver on SDR With FPGA☆48Updated last year
- Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…☆77Updated 2 years ago
- 通过调试ADRV9009和AD9371对jesd204b知识点作进一步学习和总结☆23Updated 6 years ago
- Partial Verilog implimentation of a WiMAX OFDM Phy☆19Updated 13 years ago
- PYNQ example of an OFDM Transmitter and Receiver on RFSoC.☆55Updated 2 years ago
- DVB-S2 LDPC Decoder☆28Updated 11 years ago
- FEC Codec IP core library for a some famous codes (BCH, RS, LDPC, Turbo)☆124Updated last week
- Full piplined LDPC decoder (IEEE 802.16e) implement in FPGA using Xilinx HLS(C synthesis to Verilog Codes)..☆41Updated 6 years ago
- ☆14Updated 7 years ago
- Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.☆125Updated 4 months ago
- Reed Solomon Encoder and Decoder Digital IP☆21Updated 5 years ago
- Low Density Parity Check Decoder☆18Updated 9 years ago
- PYNQ example of using the RFSoC as a QPSK transceiver.☆108Updated 2 years ago
- An efficient implementation of the Viterbi decoding algorithm in Verilog☆58Updated last year
- Implementation of Wireless communication blocks such as FFT, OFDM receiver, Polar code decoder in a FPGA using Vivado HLS☆28Updated 4 years ago
- Using Software Designed Radio to transmit & receive FM signal☆47Updated 7 years ago
- Standalone application based on ADI hdl and no_OS for ANTSDR.☆22Updated 7 months ago
- The Design and Implementation of a Pulse Compression Filter on an FPGA.☆31Updated 4 years ago
- MATLAB toolbox for ADI transceiver products☆63Updated 7 months ago
- A project demonstrate how to config ad9361 to TX mode and how to transmit GMSK☆16Updated 6 years ago
- LTE/WiFi/5G-NR SDR Transceiver☆55Updated 6 years ago
- A QPSK modem written in the Verilog hardware description language, that can be implemented on FPGA☆183Updated last year
- ☆19Updated 4 years ago
- IEEE 802.16 OFDM-based transceiver system☆28Updated 6 years ago
- My code repositry for common use.☆23Updated 3 years ago
- 用Verilog语言编写,实现2FSK,2PSK, 2DPSK, QPSK调制解调☆41Updated 6 years ago
- - Designed the LDPC decoder in the Matlab using the min-sum approach. - Designed quantized RTL in Verilog with the min-sum approach and …☆52Updated 8 years ago
- Gigabit Ethernet UDP communication driver☆80Updated 6 years ago