Lcrypto / FEC-Archive-Verilog

Related projects ⓘ

Alternatives and complementary repositories for FEC-Archive-Verilog

• dshekhalev / FEC
  FEC Codec IP core library for a some famous codes (BCH, RS, LDPC, Turbo)
  ☆87Updated 5 months ago
• jfoshea / Viterbi-Decoder-in-Verilog
  An efficient implementation of the Viterbi decoding algorithm in Verilog
  ☆45Updated 8 months ago
• Spartak0s / Polar-Codes-Hardware-VHDL
  Polar Codes Implementation on Vhdl
  ☆12Updated 8 years ago
• Hyacinth2333 / QC_LDPC-ECC
  NMS_decode
  ☆11Updated 4 years ago
• Teddy-van-Jerry / sdr-psk-fpga
  Dual-Mode PSK Transceiver on SDR With FPGA
  ☆21Updated last month
• biren15 / Design-and-Verification-of-LDPC-Decoder
  - Designed the LDPC decoder in the Matlab using the min-sum approach. - Designed quantized RTL in Verilog with the min-sum approach and …
  ☆44Updated 7 years ago
• phthinh / OFDM_802_11
  IEEE 802.11 OFDM-based transceiver system
  ☆31Updated 6 years ago
• Grootzz / AD9361_TX_MSK
  A project demonstrate how to config ad9361 to TX mode and how to transmit MSK
  ☆52Updated 5 years ago
• freedomhust / LDPC_MS
  最小和算法实现
  ☆11Updated 4 years ago
• strath-sdr / rfsoc_ofdm
  PYNQ example of an OFDM Transmitter and Receiver on RFSoC.
  ☆44Updated last year
• yugithub / OFDM-baseband
  Verilog实现OFDM基带
  ☆39Updated 8 years ago
• cea-wind / hls_ldpc_dec
  Full piplined LDPC decoder (IEEE 802.16e) implement in FPGA using Xilinx HLS(C synthesis to Verilog Codes)..
  ☆36Updated 5 years ago
• freecores / dvb_s2_ldpc_decoder
  DVB-S2 LDPC Decoder
  ☆25Updated 10 years ago
• Mshivam2409 / LDPC-Decoder
  Implementation of Partially Parellel LDPC Code Decoder in Verilog
  ☆12Updated 4 years ago
• hhping / LDPC_en-decoder
  LDPC编码解码matlab代码和Verilog代码及资料
  ☆41Updated 6 years ago
• arun1993 / FPGA-Wireless-communication-blocks
  Implementation of Wireless communication blocks such as FFT, OFDM receiver, Polar code decoder in a FPGA using Vivado HLS
  ☆21Updated 3 years ago
• lisliyongming / JESD204B
  通过调试ADRV9009和AD9371对jesd204b知识点作进一步学习和总结
  ☆22Updated 5 years ago
• strath-sdr / rfsoc_frequency_planner
  An RFSoC Frequency Planner developed using Python.
  ☆20Updated last year
• ghaziiii / Digital-predistortion
  This project aims to implement a digital predistortion algorithm for power amplifier linearizion using vhdl. It contains VHDL design for …
  ☆16Updated last year
• strath-sdr / rfsoc_notebooks
  A collection of RFSoC introductory notebooks for PYNQ.
  ☆19Updated 3 years ago
• Xilinx / RFSoC2x2-PYNQ
  RFSoC2x2 board repo for PYNQ
  ☆17Updated 2 years ago
• blegal / Fast_LDPC_decoder_for_x86
  The source codes of the fast x86 LDPC decoder published
  ☆25Updated 4 years ago
• ajackevic / ELEC5882
  The Design and Implementation of a Pulse Compression Filter on an FPGA.
  ☆23Updated 3 years ago
• CodePurble / ldpc-fpga
  Playground for implementing LDPC codes on FPGA
  ☆15Updated last year
• aff3ct / polar_decoder_gen
  This project is made to generate Polar decoders (unrolled decoders).
  ☆11Updated 4 years ago
• liuguangxi / wifi_ldpc_codec
  Wi-Fi LDPC codec Verilog IP core
  ☆15Updated 5 years ago
• sainathiyer / Hardware-Implementation-of-Polar-Code-for-5G-Application-on-FPGA
  Polar codes are error correction codes developed by Erdal Arikan which achieves channel capacity and its reduced complexity makes it more…
  ☆15Updated 3 years ago
• strath-sdr / pynq_agc
  Demonstration of Automatic Gain Control with PYNQ
  ☆11Updated 2 years ago
• phthinh / OFDM_802_16
  IEEE 802.16 OFDM-based transceiver system
  ☆21Updated 5 years ago
• Anthon1e / JESD204B-Transport-and-Data-Link-Layer
  Implementation of JESD204B Transport Layer & part of Data Link Layer
  ☆26Updated 3 years ago