Hyacinth2333 / QC_LDPC-ECC

Related projects: ⓘ

• biren15 / Design-and-Verification-of-LDPC-Decoder
  - Designed the LDPC decoder in the Matlab using the min-sum approach. - Designed quantized RTL in Verilog with the min-sum approach and …
  ☆43Updated 7 years ago
• hhping / LDPC_en-decoder
  LDPC编码解码matlab代码和Verilog代码及资料
  ☆40Updated 6 years ago
• Lcrypto / FEC-Archive-Verilog
  Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…
  ☆52Updated last year
• Spartak0s / Polar-Codes-Hardware-VHDL
  Polar Codes Implementation on Vhdl
  ☆12Updated 8 years ago
• arun1993 / FPGA-Wireless-communication-blocks
  Implementation of Wireless communication blocks such as FFT, OFDM receiver, Polar code decoder in a FPGA using Vivado HLS
  ☆19Updated 3 years ago
• jfoshea / Viterbi-Decoder-in-Verilog
  An efficient implementation of the Viterbi decoding algorithm in Verilog
  ☆41Updated 6 months ago
• dshekhalev / FEC
  FEC Codec IP core library for a some famous codes (BCH, RS, LDPC, Turbo)
  ☆84Updated 2 months ago
• cea-wind / hls_ldpc_dec
  Full piplined LDPC decoder (IEEE 802.16e) implement in FPGA using Xilinx HLS(C synthesis to Verilog Codes)..
  ☆36Updated 5 years ago
• phthinh / OFDM_802_11
  IEEE 802.11 OFDM-based transceiver system
  ☆29Updated 6 years ago
• Grootzz / AD9361_TX_MSK
  A project demonstrate how to config ad9361 to TX mode and how to transmit MSK
  ☆48Updated 5 years ago
• sainathiyer / Hardware-Implementation-of-Polar-Code-for-5G-Application-on-FPGA
  Polar codes are error correction codes developed by Erdal Arikan which achieves channel capacity and its reduced complexity makes it more…
  ☆15Updated 3 years ago
• yugithub / OFDM-baseband
  Verilog实现OFDM基带
  ☆38Updated 8 years ago
• freecores / dvb_s2_ldpc_decoder
  DVB-S2 LDPC Decoder
  ☆24Updated 10 years ago
• Joinn99 / Costas-Loop-Matlab-Simulation
  matlab
  ☆13Updated 5 years ago
• coole198669 / viterbi_decoder
  Hardware Viterbi Decoder in verilog
  ☆20Updated 5 years ago
• lauchinyuan / FPGA_QPSK-modem
  A QPSK modem written in the Verilog hardware description language, that can be implemented on FPGA
  ☆88Updated 9 months ago
• simgunz / 802.11n-ldpc
  A matlab implementation of the 802.11n LDPC encoder and decoder
  ☆57Updated 2 years ago
• strath-sdr / rfsoc_ofdm
  PYNQ example of an OFDM Transmitter and Receiver on RFSoC.
  ☆44Updated last year
• wyvernSemi / eccExamples
  Error correction and detection example Verilog (hamming and Reed-Solomon) to accompany presentation material
  ☆10Updated 8 months ago
• Grootzz / Verilog-FIR
  FIR implemention with Verilog
  ☆43Updated 5 years ago
• lisliyongming / JESD204B
  通过调试ADRV9009和AD9371对jesd204b知识点作进一步学习和总结
  ☆22Updated 4 years ago
• robmaunder / ldpc-3gpp-matlab
  Matlab simulations of the encoder and decoder for the New Radio LDPC code from 3GPP Release 15
  ☆43Updated 3 years ago
• fantasua / PolarCodesMatLab
  Polar Codes MatLab
  ☆17Updated 7 years ago
• Wardo82 / DVBS2
  MATLAB implementation of the DVB-S2 as in ETSI EN 302 307-1
  ☆11Updated 3 years ago
• liuguangxi / wifi_ldpc_codec
  Wi-Fi LDPC codec Verilog IP core
  ☆15Updated 4 years ago
• ghaziiii / Digital-predistortion
  This project aims to implement a digital predistortion algorithm for power amplifier linearizion using vhdl. It contains VHDL design for …
  ☆15Updated last year
• mladmon / bch
  BCH error-correcting code MATLAB simulator - University of Michigan (Winter, 2011)
  ☆12Updated 4 years ago
• russdill / bch_verilog
  Verilog based BCH encoder/decoder
  ☆105Updated last year
• crboth / LDPC_Decoder
  Low Density Parity Check Decoder
  ☆16Updated 8 years ago
• bigdot123456 / 5GPolar
  Polar encoding & decoding
  ☆11Updated 5 years ago